x86: Use bool function return values of true/false not 1/0
Use the normal return values for bool functions Signed-off-by: Joe Perches <joe@perches.com> Message-Id: <9f593eb2f43b456851cd73f7ed09654ca58fb570.1427759009.git.joe@perches.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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1d804d079a
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@ -115,7 +115,7 @@ static inline void kvm_spinlock_init(void)
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static inline bool kvm_para_available(void)
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{
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return 0;
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return false;
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}
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static inline unsigned int kvm_arch_para_features(void)
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@ -26,7 +26,7 @@ static inline bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
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struct kvm_cpuid_entry2 *best;
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if (!static_cpu_has(X86_FEATURE_XSAVE))
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return 0;
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return false;
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best = kvm_find_cpuid_entry(vcpu, 1, 0);
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return best && (best->ecx & bit(X86_FEATURE_XSAVE));
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@ -7314,21 +7314,21 @@ static bool nested_vmx_exit_handled_io(struct kvm_vcpu *vcpu,
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else if (port < 0x10000)
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bitmap = vmcs12->io_bitmap_b;
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else
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return 1;
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return true;
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bitmap += (port & 0x7fff) / 8;
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if (last_bitmap != bitmap)
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if (kvm_read_guest(vcpu->kvm, bitmap, &b, 1))
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return 1;
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return true;
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if (b & (1 << (port & 7)))
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return 1;
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return true;
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port++;
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size--;
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last_bitmap = bitmap;
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}
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return 0;
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return false;
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}
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/*
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@ -7344,7 +7344,7 @@ static bool nested_vmx_exit_handled_msr(struct kvm_vcpu *vcpu,
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gpa_t bitmap;
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if (!nested_cpu_has(vmcs12, CPU_BASED_USE_MSR_BITMAPS))
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return 1;
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return true;
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/*
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* The MSR_BITMAP page is divided into four 1024-byte bitmaps,
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@ -7363,10 +7363,10 @@ static bool nested_vmx_exit_handled_msr(struct kvm_vcpu *vcpu,
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if (msr_index < 1024*8) {
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unsigned char b;
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if (kvm_read_guest(vcpu->kvm, bitmap + msr_index/8, &b, 1))
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return 1;
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return true;
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return 1 & (b >> (msr_index & 7));
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} else
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return 1; /* let L1 handle the wrong parameter */
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return true; /* let L1 handle the wrong parameter */
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}
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/*
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@ -7388,7 +7388,7 @@ static bool nested_vmx_exit_handled_cr(struct kvm_vcpu *vcpu,
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case 0:
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if (vmcs12->cr0_guest_host_mask &
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(val ^ vmcs12->cr0_read_shadow))
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return 1;
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return true;
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break;
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case 3:
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if ((vmcs12->cr3_target_count >= 1 &&
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@ -7399,37 +7399,37 @@ static bool nested_vmx_exit_handled_cr(struct kvm_vcpu *vcpu,
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vmcs12->cr3_target_value2 == val) ||
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(vmcs12->cr3_target_count >= 4 &&
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vmcs12->cr3_target_value3 == val))
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return 0;
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return false;
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if (nested_cpu_has(vmcs12, CPU_BASED_CR3_LOAD_EXITING))
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return 1;
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return true;
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break;
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case 4:
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if (vmcs12->cr4_guest_host_mask &
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(vmcs12->cr4_read_shadow ^ val))
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return 1;
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return true;
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break;
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case 8:
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if (nested_cpu_has(vmcs12, CPU_BASED_CR8_LOAD_EXITING))
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return 1;
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return true;
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break;
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}
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break;
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case 2: /* clts */
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if ((vmcs12->cr0_guest_host_mask & X86_CR0_TS) &&
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(vmcs12->cr0_read_shadow & X86_CR0_TS))
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return 1;
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return true;
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break;
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case 1: /* mov from cr */
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switch (cr) {
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case 3:
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if (vmcs12->cpu_based_vm_exec_control &
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CPU_BASED_CR3_STORE_EXITING)
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return 1;
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return true;
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break;
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case 8:
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if (vmcs12->cpu_based_vm_exec_control &
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CPU_BASED_CR8_STORE_EXITING)
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return 1;
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return true;
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break;
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}
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break;
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@ -7440,14 +7440,14 @@ static bool nested_vmx_exit_handled_cr(struct kvm_vcpu *vcpu,
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*/
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if (vmcs12->cr0_guest_host_mask & 0xe &
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(val ^ vmcs12->cr0_read_shadow))
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return 1;
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return true;
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if ((vmcs12->cr0_guest_host_mask & 0x1) &&
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!(vmcs12->cr0_read_shadow & 0x1) &&
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(val & 0x1))
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return 1;
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return true;
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break;
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}
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return 0;
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return false;
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}
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/*
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@ -7470,43 +7470,43 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
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KVM_ISA_VMX);
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if (vmx->nested.nested_run_pending)
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return 0;
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return false;
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if (unlikely(vmx->fail)) {
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pr_info_ratelimited("%s failed vm entry %x\n", __func__,
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vmcs_read32(VM_INSTRUCTION_ERROR));
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return 1;
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return true;
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}
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switch (exit_reason) {
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case EXIT_REASON_EXCEPTION_NMI:
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if (!is_exception(intr_info))
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return 0;
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return false;
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else if (is_page_fault(intr_info))
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return enable_ept;
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else if (is_no_device(intr_info) &&
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!(vmcs12->guest_cr0 & X86_CR0_TS))
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return 0;
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return false;
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return vmcs12->exception_bitmap &
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(1u << (intr_info & INTR_INFO_VECTOR_MASK));
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case EXIT_REASON_EXTERNAL_INTERRUPT:
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return 0;
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return false;
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case EXIT_REASON_TRIPLE_FAULT:
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return 1;
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return true;
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case EXIT_REASON_PENDING_INTERRUPT:
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return nested_cpu_has(vmcs12, CPU_BASED_VIRTUAL_INTR_PENDING);
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case EXIT_REASON_NMI_WINDOW:
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return nested_cpu_has(vmcs12, CPU_BASED_VIRTUAL_NMI_PENDING);
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case EXIT_REASON_TASK_SWITCH:
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return 1;
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return true;
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case EXIT_REASON_CPUID:
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if (kvm_register_read(vcpu, VCPU_REGS_RAX) == 0xa)
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return 0;
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return 1;
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return false;
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return true;
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case EXIT_REASON_HLT:
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return nested_cpu_has(vmcs12, CPU_BASED_HLT_EXITING);
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case EXIT_REASON_INVD:
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return 1;
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return true;
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case EXIT_REASON_INVLPG:
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return nested_cpu_has(vmcs12, CPU_BASED_INVLPG_EXITING);
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case EXIT_REASON_RDPMC:
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@ -7523,7 +7523,7 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
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* VMX instructions trap unconditionally. This allows L1 to
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* emulate them for its L2 guest, i.e., allows 3-level nesting!
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*/
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return 1;
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return true;
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case EXIT_REASON_CR_ACCESS:
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return nested_vmx_exit_handled_cr(vcpu, vmcs12);
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case EXIT_REASON_DR_ACCESS:
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@ -7534,7 +7534,7 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
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case EXIT_REASON_MSR_WRITE:
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return nested_vmx_exit_handled_msr(vcpu, vmcs12, exit_reason);
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case EXIT_REASON_INVALID_STATE:
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return 1;
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return true;
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case EXIT_REASON_MWAIT_INSTRUCTION:
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return nested_cpu_has(vmcs12, CPU_BASED_MWAIT_EXITING);
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case EXIT_REASON_MONITOR_INSTRUCTION:
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@ -7544,7 +7544,7 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
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nested_cpu_has2(vmcs12,
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SECONDARY_EXEC_PAUSE_LOOP_EXITING);
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case EXIT_REASON_MCE_DURING_VMENTRY:
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return 0;
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return false;
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case EXIT_REASON_TPR_BELOW_THRESHOLD:
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return nested_cpu_has(vmcs12, CPU_BASED_TPR_SHADOW);
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case EXIT_REASON_APIC_ACCESS:
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@ -7553,7 +7553,7 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
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case EXIT_REASON_APIC_WRITE:
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case EXIT_REASON_EOI_INDUCED:
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/* apic_write and eoi_induced should exit unconditionally. */
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return 1;
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return true;
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case EXIT_REASON_EPT_VIOLATION:
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/*
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* L0 always deals with the EPT violation. If nested EPT is
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@ -7561,7 +7561,7 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
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* missing in the guest EPT table (EPT12), the EPT violation
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* will be injected with nested_ept_inject_page_fault()
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*/
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return 0;
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return false;
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case EXIT_REASON_EPT_MISCONFIG:
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/*
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* L2 never uses directly L1's EPT, but rather L0's own EPT
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@ -7569,11 +7569,11 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
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* (EPT on EPT). So any problems with the structure of the
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* table is L0's fault.
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*/
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return 0;
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return false;
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case EXIT_REASON_WBINVD:
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return nested_cpu_has2(vmcs12, SECONDARY_EXEC_WBINVD_EXITING);
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case EXIT_REASON_XSETBV:
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return 1;
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return true;
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case EXIT_REASON_XSAVES: case EXIT_REASON_XRSTORS:
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/*
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* This should never happen, since it is not possible to
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@ -7583,7 +7583,7 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
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*/
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return nested_cpu_has2(vmcs12, SECONDARY_EXEC_XSAVES);
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default:
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return 1;
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return true;
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}
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}
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