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drm/i915: start writing infoframes at address 0 on gen 4 

Make sure we're doing the right thing, just like we do on gen5+.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Paulo Zanoni 2012-05-04 17:18:18 -03:00 committed by Daniel Vetter
parent 22509ec867
commit 1d4f85ac2d
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/i915/intel_hdmi.c
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@ -132,7 +132,7 @@ static void i9xx_write_infoframe(struct drm_encoder *encoder,
else else
return; return;
val &= ~VIDEO_DIP_SELECT_MASK; val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */
val |= intel_infoframe_index(frame); val |= intel_infoframe_index(frame);
val |= VIDEO_DIP_ENABLE; val |= VIDEO_DIP_ENABLE;