media: coda: Add i.MX51 (CodaHx4) support
Add support for the CodaHx4 VPU used on i.MX51. Decoding h.264, MPEG-4, and MPEG-2 video works, as well as encoding h.264. MPEG-4 encoding is not enabled, it currently produces visual artifacts. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> [hans.verkuil@cisco.com: fix (bogus) sparse warning about uninited me_bits] Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
This commit is contained in:
Philipp Zabel
Mauro Carvalho Chehab
parent
9f57ccdcf4
commit
1d1ca23bcb
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@ -68,8 +68,9 @@ static void coda_command_async(struct coda_ctx *ctx, int cmd)
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{
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struct coda_dev *dev = ctx->dev;
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if (dev->devtype->product == CODA_960 ||
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dev->devtype->product == CODA_7541) {
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if (dev->devtype->product == CODA_HX4 ||
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dev->devtype->product == CODA_7541 ||
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dev->devtype->product == CODA_960) {
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/* Restore context related registers to CODA */
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coda_write(dev, ctx->bit_stream_param,
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CODA_REG_BIT_BIT_STREAM_PARAM);
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@ -506,7 +507,8 @@ static int coda_alloc_context_buffers(struct coda_ctx *ctx,
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goto err;
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}
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if (!ctx->psbuf.vaddr && dev->devtype->product == CODA_7541) {
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if (!ctx->psbuf.vaddr && (dev->devtype->product == CODA_HX4 ||
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dev->devtype->product == CODA_7541)) {
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ret = coda_alloc_context_buf(ctx, &ctx->psbuf,
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CODA7_PS_BUF_SIZE, "psbuf");
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if (ret < 0)
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@ -594,6 +596,7 @@ static void coda_setup_iram(struct coda_ctx *ctx)
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int dbk_bits;
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int bit_bits;
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int ip_bits;
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int me_bits;
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memset(iram_info, 0, sizeof(*iram_info));
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iram_info->next_paddr = dev->iram.paddr;
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@ -603,15 +606,23 @@ static void coda_setup_iram(struct coda_ctx *ctx)
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return;
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switch (dev->devtype->product) {
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case CODA_HX4:
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dbk_bits = CODA7_USE_HOST_DBK_ENABLE;
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bit_bits = CODA7_USE_HOST_BIT_ENABLE;
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ip_bits = CODA7_USE_HOST_IP_ENABLE;
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me_bits = CODA7_USE_HOST_ME_ENABLE;
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break;
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case CODA_7541:
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dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
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bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
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ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
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me_bits = CODA7_USE_HOST_ME_ENABLE | CODA7_USE_ME_ENABLE;
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break;
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case CODA_960:
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dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE;
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bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
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ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
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me_bits = 0;
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break;
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default: /* CODA_DX6 */
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return;
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@ -626,7 +637,8 @@ static void coda_setup_iram(struct coda_ctx *ctx)
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w64 = mb_width * 64;
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/* Prioritize in case IRAM is too small for everything */
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if (dev->devtype->product == CODA_7541) {
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if (dev->devtype->product == CODA_HX4 ||
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dev->devtype->product == CODA_7541) {
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iram_info->search_ram_size = round_up(mb_width * 16 *
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36 + 2048, 1024);
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iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
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@ -635,8 +647,7 @@ static void coda_setup_iram(struct coda_ctx *ctx)
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pr_err("IRAM is smaller than the search ram size\n");
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goto out;
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}
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iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE |
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CODA7_USE_ME_ENABLE;
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iram_info->axi_sram_use |= me_bits;
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}
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/* Only H.264BP and H.263P3 are considered */
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@ -688,7 +699,8 @@ out:
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v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
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"IRAM smaller than needed\n");
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if (dev->devtype->product == CODA_7541) {
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if (dev->devtype->product == CODA_HX4 ||
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dev->devtype->product == CODA_7541) {
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/* TODO - Enabling these causes picture errors on CODA7541 */
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if (ctx->inst_type == CODA_INST_DECODER) {
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/* fw 1.4.50 */
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@ -706,6 +718,7 @@ out:
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static u32 coda_supported_firmwares[] = {
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CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
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CODA_FIRMWARE_VERNUM(CODA_HX4, 1, 4, 50),
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CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
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CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5),
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CODA_FIRMWARE_VERNUM(CODA_960, 2, 3, 10),
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@ -890,6 +903,7 @@ static int coda_start_encoding(struct coda_ctx *ctx)
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case CODA_960:
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coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
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/* fallthrough */
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case CODA_HX4:
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case CODA_7541:
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coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
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CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
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@ -919,6 +933,7 @@ static int coda_start_encoding(struct coda_ctx *ctx)
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value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK)
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<< CODA_PICHEIGHT_OFFSET;
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break;
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case CODA_HX4:
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case CODA_7541:
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if (dst_fourcc == V4L2_PIX_FMT_H264) {
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value = (round_up(q_data_src->width, 16) &
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@ -1086,6 +1101,7 @@ static int coda_start_encoding(struct coda_ctx *ctx)
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value = FMO_SLICE_SAVE_BUF_SIZE << 7;
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coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
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break;
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case CODA_HX4:
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case CODA_7541:
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coda_write(dev, ctx->iram_info.search_ram_paddr,
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CODA7_CMD_ENC_SEQ_SEARCH_BASE);
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@ -1131,7 +1147,8 @@ static int coda_start_encoding(struct coda_ctx *ctx)
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coda_write(dev, num_fb, CODA_CMD_SET_FRAME_BUF_NUM);
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coda_write(dev, stride, CODA_CMD_SET_FRAME_BUF_STRIDE);
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if (dev->devtype->product == CODA_7541) {
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if (dev->devtype->product == CODA_HX4 ||
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dev->devtype->product == CODA_7541) {
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coda_write(dev, q_data_src->bytesperline,
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CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
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}
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@ -1570,7 +1587,8 @@ static bool coda_reorder_enable(struct coda_ctx *ctx)
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struct coda_dev *dev = ctx->dev;
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int profile, level;
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if (dev->devtype->product != CODA_7541 &&
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if (dev->devtype->product != CODA_HX4 &&
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dev->devtype->product != CODA_7541 &&
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dev->devtype->product != CODA_960)
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return false;
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@ -1664,7 +1682,8 @@ static int __coda_start_decoding(struct coda_ctx *ctx)
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CODA_CMD_DEC_SEQ_MP4_ASP_CLASS);
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}
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if (src_fourcc == V4L2_PIX_FMT_H264) {
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if (dev->devtype->product == CODA_7541) {
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if (dev->devtype->product == CODA_HX4 ||
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dev->devtype->product == CODA_7541) {
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coda_write(dev, ctx->psbuf.paddr,
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CODA_CMD_DEC_SEQ_PS_BB_START);
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coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
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@ -1791,7 +1810,8 @@ static int __coda_start_decoding(struct coda_ctx *ctx)
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CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
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}
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if (dev->devtype->product == CODA_7541) {
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if (dev->devtype->product == CODA_HX4 ||
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dev->devtype->product == CODA_7541) {
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int max_mb_x = 1920 / 16;
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int max_mb_y = 1088 / 16;
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int max_mb_num = max_mb_x * max_mb_y;
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@ -1909,6 +1929,7 @@ static int coda_prepare_decode(struct coda_ctx *ctx)
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switch (dev->devtype->product) {
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case CODA_DX6:
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/* TBD */
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case CODA_HX4:
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case CODA_7541:
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coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
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break;
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@ -2049,7 +2070,8 @@ static void coda_finish_decode(struct coda_ctx *ctx)
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v4l2_err(&dev->v4l2_dev,
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"errors in %d macroblocks\n", err_mb);
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if (dev->devtype->product == CODA_7541) {
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if (dev->devtype->product == CODA_HX4 ||
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dev->devtype->product == CODA_7541) {
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val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
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if (val == 0) {
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/* not enough bitstream data */
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@ -128,7 +128,8 @@ void coda_write_base(struct coda_ctx *ctx, struct coda_q_data *q_data,
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/*
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* Arrays of codecs supported by each given version of Coda:
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* i.MX27 -> codadx6
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* i.MX5x -> coda7
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* i.MX51 -> codahx4
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* i.MX53 -> coda7
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* i.MX6 -> coda960
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* Use V4L2_PIX_FMT_YUV420 as placeholder for all supported YUV 4:2:0 variants
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*/
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@ -137,6 +138,13 @@ static const struct coda_codec codadx6_codecs[] = {
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CODA_CODEC(CODADX6_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 720, 576),
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};
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static const struct coda_codec codahx4_codecs[] = {
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CODA_CODEC(CODA7_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 720, 576),
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CODA_CODEC(CODA7_MODE_DECODE_H264, V4L2_PIX_FMT_H264, V4L2_PIX_FMT_YUV420, 1920, 1088),
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CODA_CODEC(CODA7_MODE_DECODE_MP2, V4L2_PIX_FMT_MPEG2, V4L2_PIX_FMT_YUV420, 1920, 1088),
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CODA_CODEC(CODA7_MODE_DECODE_MP4, V4L2_PIX_FMT_MPEG4, V4L2_PIX_FMT_YUV420, 1280, 720),
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};
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static const struct coda_codec coda7_codecs[] = {
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CODA_CODEC(CODA7_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 1280, 720),
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CODA_CODEC(CODA7_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 1280, 720),
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@ -234,6 +242,11 @@ static const struct coda_video_device *codadx6_video_devices[] = {
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&coda_bit_encoder,
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};
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static const struct coda_video_device *codahx4_video_devices[] = {
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&coda_bit_encoder,
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&coda_bit_decoder,
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};
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static const struct coda_video_device *coda7_video_devices[] = {
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&coda_bit_jpeg_encoder,
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&coda_bit_jpeg_decoder,
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@ -332,6 +345,8 @@ const char *coda_product_name(int product)
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switch (product) {
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case CODA_DX6:
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return "CodaDx6";
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case CODA_HX4:
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return "CodaHx4";
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case CODA_7541:
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return "CODA7541";
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case CODA_960:
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@ -1775,7 +1790,8 @@ static void coda_encode_ctrls(struct coda_ctx *ctx)
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V4L2_CID_MPEG_VIDEO_H264_PROFILE,
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V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, 0x0,
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V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE);
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if (ctx->dev->devtype->product == CODA_7541) {
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if (ctx->dev->devtype->product == CODA_HX4 ||
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ctx->dev->devtype->product == CODA_7541) {
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v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
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V4L2_CID_MPEG_VIDEO_H264_LEVEL,
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V4L2_MPEG_VIDEO_H264_LEVEL_3_1,
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@ -1803,7 +1819,8 @@ static void coda_encode_ctrls(struct coda_ctx *ctx)
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V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE,
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V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE, 0x0,
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V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE);
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if (ctx->dev->devtype->product == CODA_7541 ||
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if (ctx->dev->devtype->product == CODA_HX4 ||
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ctx->dev->devtype->product == CODA_7541 ||
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ctx->dev->devtype->product == CODA_960) {
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v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
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V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL,
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@ -2004,6 +2021,7 @@ static int coda_open(struct file *file)
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if (enable_bwb || ctx->inst_type == CODA_INST_ENCODER)
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ctx->frame_mem_ctrl = CODA9_FRAME_ENABLE_BWB;
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/* fallthrough */
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case CODA_HX4:
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case CODA_7541:
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ctx->reg_idx = 0;
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break;
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@ -2182,7 +2200,8 @@ static int coda_hw_init(struct coda_dev *dev)
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/* Tell the BIT where to find everything it needs */
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if (dev->devtype->product == CODA_960 ||
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dev->devtype->product == CODA_7541) {
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dev->devtype->product == CODA_7541 ||
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dev->devtype->product == CODA_HX4) {
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coda_write(dev, dev->tempbuf.paddr,
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CODA_REG_BIT_TEMP_BUF_ADDR);
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coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
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@ -2387,6 +2406,7 @@ put_pm:
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enum coda_platform {
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CODA_IMX27,
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CODA_IMX51,
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CODA_IMX53,
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CODA_IMX6Q,
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CODA_IMX6DL,
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@ -2407,6 +2427,21 @@ static const struct coda_devtype coda_devdata[] = {
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.workbuf_size = 288 * 1024 + FMO_SLICE_SAVE_BUF_SIZE * 8 * 1024,
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.iram_size = 0xb000,
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},
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[CODA_IMX51] = {
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.firmware = {
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"vpu_fw_imx51.bin",
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"vpu/vpu_fw_imx51.bin",
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"v4l-codahx4-imx51.bin"
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},
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.product = CODA_HX4,
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.codecs = codahx4_codecs,
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.num_codecs = ARRAY_SIZE(codahx4_codecs),
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.vdevs = codahx4_video_devices,
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.num_vdevs = ARRAY_SIZE(codahx4_video_devices),
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.workbuf_size = 128 * 1024,
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.tempbuf_size = 304 * 1024,
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.iram_size = 0x14000,
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},
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[CODA_IMX53] = {
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.firmware = {
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"vpu_fw_imx53.bin",
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@ -2463,6 +2498,7 @@ MODULE_DEVICE_TABLE(platform, coda_platform_ids);
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#ifdef CONFIG_OF
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static const struct of_device_id coda_dt_ids[] = {
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{ .compatible = "fsl,imx27-vpu", .data = &coda_devdata[CODA_IMX27] },
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{ .compatible = "fsl,imx51-vpu", .data = &coda_devdata[CODA_IMX51] },
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{ .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
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{ .compatible = "fsl,imx6q-vpu", .data = &coda_devdata[CODA_IMX6Q] },
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{ .compatible = "fsl,imx6dl-vpu", .data = &coda_devdata[CODA_IMX6DL] },
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@ -43,6 +43,7 @@ enum coda_inst_type {
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enum coda_product {
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CODA_DX6 = 0xf001,
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CODA_HX4 = 0xf00a,
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CODA_7541 = 0xf012,
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CODA_960 = 0xf020,
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};
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