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drm/amd/display: Re-arrange GFX9 fields 

For more clear usage in future

Signed-off-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Nevenko Stupar 2018-11-08 19:20:11 -05:00 committed by Alex Deucher
parent 65d38262b3
commit 1cc9f371fa
1 changed files with 4 additions and 3 deletions
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7
drivers/gpu/drm/amd/display/dc/dc_hw_types.h
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@ -358,15 +358,16 @@ union dc_tiling_info {
} gfx8;
struct {
enum swizzle_mode_values swizzle;
unsigned int num_pipes;
unsigned int num_banks;
unsigned int max_compressed_frags;
unsigned int pipe_interleave;
unsigned int num_banks;
unsigned int num_shader_engines;
unsigned int num_rb_per_se;
unsigned int max_compressed_frags;
bool shaderEnable;
enum swizzle_mode_values swizzle;
bool meta_linear;
bool rb_aligned;
bool pipe_aligned;