spi: sh-msiof: switch to use modern name
Change legacy name master/slave to modern name host/target. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230818093154.1183529-20-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -54,7 +54,7 @@ struct sh_msiof_spi_priv {
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dma_addr_t rx_dma_addr;
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dma_addr_t rx_dma_addr;
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bool native_cs_inited;
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bool native_cs_inited;
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bool native_cs_high;
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bool native_cs_high;
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bool slave_aborted;
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bool target_aborted;
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};
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};
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#define MAX_SS 3 /* Maximum number of native chip selects */
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#define MAX_SS 3 /* Maximum number of native chip selects */
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@ -361,7 +361,7 @@ static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p, u32 ss,
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tmp |= !cs_high << SIMDR1_SYNCAC_SHIFT;
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tmp |= !cs_high << SIMDR1_SYNCAC_SHIFT;
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tmp |= lsb_first << SIMDR1_BITLSB_SHIFT;
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tmp |= lsb_first << SIMDR1_BITLSB_SHIFT;
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tmp |= sh_msiof_spi_get_dtdl_and_syncdl(p);
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tmp |= sh_msiof_spi_get_dtdl_and_syncdl(p);
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if (spi_controller_is_slave(p->ctlr)) {
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if (spi_controller_is_target(p->ctlr)) {
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sh_msiof_write(p, SITMDR1, tmp | SITMDR1_PCON);
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sh_msiof_write(p, SITMDR1, tmp | SITMDR1_PCON);
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} else {
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} else {
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sh_msiof_write(p, SITMDR1,
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sh_msiof_write(p, SITMDR1,
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@ -553,7 +553,7 @@ static int sh_msiof_spi_setup(struct spi_device *spi)
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spi_controller_get_devdata(spi->controller);
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spi_controller_get_devdata(spi->controller);
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u32 clr, set, tmp;
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u32 clr, set, tmp;
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if (spi_get_csgpiod(spi, 0) || spi_controller_is_slave(p->ctlr))
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if (spi_get_csgpiod(spi, 0) || spi_controller_is_target(p->ctlr))
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return 0;
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return 0;
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if (p->native_cs_inited &&
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if (p->native_cs_inited &&
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@ -602,11 +602,11 @@ static int sh_msiof_prepare_message(struct spi_controller *ctlr,
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static int sh_msiof_spi_start(struct sh_msiof_spi_priv *p, void *rx_buf)
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static int sh_msiof_spi_start(struct sh_msiof_spi_priv *p, void *rx_buf)
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{
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{
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bool slave = spi_controller_is_slave(p->ctlr);
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bool target = spi_controller_is_target(p->ctlr);
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int ret = 0;
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int ret = 0;
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/* setup clock and rx/tx signals */
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/* setup clock and rx/tx signals */
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if (!slave)
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if (!target)
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ret = sh_msiof_modify_ctr_wait(p, 0, SICTR_TSCKE);
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ret = sh_msiof_modify_ctr_wait(p, 0, SICTR_TSCKE);
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if (rx_buf && !ret)
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if (rx_buf && !ret)
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ret = sh_msiof_modify_ctr_wait(p, 0, SICTR_RXE);
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ret = sh_msiof_modify_ctr_wait(p, 0, SICTR_RXE);
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@ -614,7 +614,7 @@ static int sh_msiof_spi_start(struct sh_msiof_spi_priv *p, void *rx_buf)
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ret = sh_msiof_modify_ctr_wait(p, 0, SICTR_TXE);
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ret = sh_msiof_modify_ctr_wait(p, 0, SICTR_TXE);
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/* start by setting frame bit */
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/* start by setting frame bit */
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if (!ret && !slave)
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if (!ret && !target)
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ret = sh_msiof_modify_ctr_wait(p, 0, SICTR_TFSE);
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ret = sh_msiof_modify_ctr_wait(p, 0, SICTR_TFSE);
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return ret;
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return ret;
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@ -622,27 +622,27 @@ static int sh_msiof_spi_start(struct sh_msiof_spi_priv *p, void *rx_buf)
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static int sh_msiof_spi_stop(struct sh_msiof_spi_priv *p, void *rx_buf)
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static int sh_msiof_spi_stop(struct sh_msiof_spi_priv *p, void *rx_buf)
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{
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{
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bool slave = spi_controller_is_slave(p->ctlr);
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bool target = spi_controller_is_target(p->ctlr);
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int ret = 0;
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int ret = 0;
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/* shut down frame, rx/tx and clock signals */
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/* shut down frame, rx/tx and clock signals */
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if (!slave)
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if (!target)
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ret = sh_msiof_modify_ctr_wait(p, SICTR_TFSE, 0);
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ret = sh_msiof_modify_ctr_wait(p, SICTR_TFSE, 0);
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if (!ret)
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if (!ret)
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ret = sh_msiof_modify_ctr_wait(p, SICTR_TXE, 0);
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ret = sh_msiof_modify_ctr_wait(p, SICTR_TXE, 0);
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if (rx_buf && !ret)
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if (rx_buf && !ret)
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ret = sh_msiof_modify_ctr_wait(p, SICTR_RXE, 0);
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ret = sh_msiof_modify_ctr_wait(p, SICTR_RXE, 0);
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if (!ret && !slave)
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if (!ret && !target)
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ret = sh_msiof_modify_ctr_wait(p, SICTR_TSCKE, 0);
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ret = sh_msiof_modify_ctr_wait(p, SICTR_TSCKE, 0);
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return ret;
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return ret;
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}
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}
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static int sh_msiof_slave_abort(struct spi_controller *ctlr)
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static int sh_msiof_target_abort(struct spi_controller *ctlr)
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{
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{
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struct sh_msiof_spi_priv *p = spi_controller_get_devdata(ctlr);
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struct sh_msiof_spi_priv *p = spi_controller_get_devdata(ctlr);
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p->slave_aborted = true;
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p->target_aborted = true;
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complete(&p->done);
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complete(&p->done);
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complete(&p->done_txdma);
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complete(&p->done_txdma);
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return 0;
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return 0;
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@ -651,9 +651,9 @@ static int sh_msiof_slave_abort(struct spi_controller *ctlr)
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static int sh_msiof_wait_for_completion(struct sh_msiof_spi_priv *p,
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static int sh_msiof_wait_for_completion(struct sh_msiof_spi_priv *p,
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struct completion *x)
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struct completion *x)
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{
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{
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if (spi_controller_is_slave(p->ctlr)) {
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if (spi_controller_is_target(p->ctlr)) {
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if (wait_for_completion_interruptible(x) ||
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if (wait_for_completion_interruptible(x) ||
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p->slave_aborted) {
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p->target_aborted) {
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dev_dbg(&p->pdev->dev, "interrupted\n");
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dev_dbg(&p->pdev->dev, "interrupted\n");
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return -EINTR;
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return -EINTR;
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}
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}
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@ -699,7 +699,7 @@ static int sh_msiof_spi_txrx_once(struct sh_msiof_spi_priv *p,
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tx_fifo(p, tx_buf, words, fifo_shift);
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tx_fifo(p, tx_buf, words, fifo_shift);
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reinit_completion(&p->done);
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reinit_completion(&p->done);
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p->slave_aborted = false;
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p->target_aborted = false;
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ret = sh_msiof_spi_start(p, rx_buf);
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ret = sh_msiof_spi_start(p, rx_buf);
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if (ret) {
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if (ret) {
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@ -796,7 +796,7 @@ static int sh_msiof_dma_once(struct sh_msiof_spi_priv *p, const void *tx,
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reinit_completion(&p->done);
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reinit_completion(&p->done);
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if (tx)
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if (tx)
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reinit_completion(&p->done_txdma);
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reinit_completion(&p->done_txdma);
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p->slave_aborted = false;
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p->target_aborted = false;
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/* Now start DMA */
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/* Now start DMA */
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if (rx)
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if (rx)
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@ -925,7 +925,7 @@ static int sh_msiof_transfer_one(struct spi_controller *ctlr,
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sh_msiof_spi_reset_regs(p);
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sh_msiof_spi_reset_regs(p);
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/* setup clocks (clock already enabled in chipselect()) */
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/* setup clocks (clock already enabled in chipselect()) */
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if (!spi_controller_is_slave(p->ctlr))
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if (!spi_controller_is_target(p->ctlr))
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sh_msiof_spi_set_clk_regs(p, t);
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sh_msiof_spi_set_clk_regs(p, t);
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while (ctlr->dma_tx && len > 15) {
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while (ctlr->dma_tx && len > 15) {
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@ -1101,11 +1101,11 @@ static struct sh_msiof_spi_info *sh_msiof_spi_parse_dt(struct device *dev)
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if (!info)
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if (!info)
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return NULL;
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return NULL;
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info->mode = of_property_read_bool(np, "spi-slave") ? MSIOF_SPI_SLAVE
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info->mode = of_property_read_bool(np, "spi-slave") ? MSIOF_SPI_TARGET
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: MSIOF_SPI_MASTER;
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: MSIOF_SPI_HOST;
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/* Parse the MSIOF properties */
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/* Parse the MSIOF properties */
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if (info->mode == MSIOF_SPI_MASTER)
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if (info->mode == MSIOF_SPI_HOST)
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of_property_read_u32(np, "num-cs", &num_cs);
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of_property_read_u32(np, "num-cs", &num_cs);
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of_property_read_u32(np, "renesas,tx-fifo-size",
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of_property_read_u32(np, "renesas,tx-fifo-size",
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&info->tx_fifo_override);
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&info->tx_fifo_override);
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@ -1279,12 +1279,12 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
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return -ENXIO;
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return -ENXIO;
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}
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}
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if (info->mode == MSIOF_SPI_SLAVE)
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if (info->mode == MSIOF_SPI_TARGET)
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ctlr = spi_alloc_slave(&pdev->dev,
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ctlr = spi_alloc_target(&pdev->dev,
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sizeof(struct sh_msiof_spi_priv));
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sizeof(struct sh_msiof_spi_priv));
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else
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else
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ctlr = spi_alloc_master(&pdev->dev,
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ctlr = spi_alloc_host(&pdev->dev,
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sizeof(struct sh_msiof_spi_priv));
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sizeof(struct sh_msiof_spi_priv));
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if (ctlr == NULL)
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if (ctlr == NULL)
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return -ENOMEM;
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return -ENOMEM;
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@ -1347,7 +1347,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
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ctlr->dev.of_node = pdev->dev.of_node;
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ctlr->dev.of_node = pdev->dev.of_node;
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ctlr->setup = sh_msiof_spi_setup;
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ctlr->setup = sh_msiof_spi_setup;
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ctlr->prepare_message = sh_msiof_prepare_message;
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ctlr->prepare_message = sh_msiof_prepare_message;
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ctlr->slave_abort = sh_msiof_slave_abort;
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ctlr->target_abort = sh_msiof_target_abort;
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ctlr->bits_per_word_mask = chipdata->bits_per_word_mask;
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ctlr->bits_per_word_mask = chipdata->bits_per_word_mask;
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ctlr->auto_runtime_pm = true;
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ctlr->auto_runtime_pm = true;
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ctlr->transfer_one = sh_msiof_transfer_one;
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ctlr->transfer_one = sh_msiof_transfer_one;
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@ -3,8 +3,8 @@
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#define __SPI_SH_MSIOF_H__
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#define __SPI_SH_MSIOF_H__
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enum {
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enum {
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MSIOF_SPI_MASTER,
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MSIOF_SPI_HOST,
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MSIOF_SPI_SLAVE,
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MSIOF_SPI_TARGET,
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};
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};
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struct sh_msiof_spi_info {
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struct sh_msiof_spi_info {
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