Merge branch 'pci/enumeration'
- Rename pcibios_add_device() to pcibios_device_add() since it's called from pci_device_add() (Oliver O'Halloran) - Don't try to enable AtomicOps on VFs, since they can only be enabled on the PF (Selvin Xavier) * pci/enumeration: PCI: Do not enable AtomicOps on VFs PCI: Rename pcibios_add_device() to pcibios_device_add()
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commit
1cac57a267
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@ -587,13 +587,12 @@ static void pcibios_fixup_resources(struct pci_dev *dev)
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources);
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int pcibios_add_device(struct pci_dev *dev)
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int pcibios_device_add(struct pci_dev *dev)
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{
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dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
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return 0;
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}
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EXPORT_SYMBOL(pcibios_add_device);
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/*
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* Reparent resource children of pr that conflict with res
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@ -1059,7 +1059,7 @@ void pcibios_bus_add_device(struct pci_dev *dev)
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ppc_md.pcibios_bus_add_device(dev);
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}
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int pcibios_add_device(struct pci_dev *dev)
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int pcibios_device_add(struct pci_dev *dev)
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{
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struct irq_domain *d;
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@ -54,7 +54,7 @@
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* to "new_size", calculated above. Implementing this is a convoluted process
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* which requires several hooks in the PCI core:
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*
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* 1. In pcibios_add_device() we call pnv_pci_ioda_fixup_iov().
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* 1. In pcibios_device_add() we call pnv_pci_ioda_fixup_iov().
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*
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* At this point the device has been probed and the device's BARs are sized,
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* but no resource allocations have been done. The SR-IOV BARs are sized
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@ -561,7 +561,7 @@ static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
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zdev->has_resources = 0;
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}
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int pcibios_add_device(struct pci_dev *pdev)
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int pcibios_device_add(struct pci_dev *pdev)
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{
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struct zpci_dev *zdev = to_zpci(pdev);
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struct resource *res;
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@ -1010,7 +1010,7 @@ void pcibios_set_master(struct pci_dev *dev)
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}
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#ifdef CONFIG_PCI_IOV
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int pcibios_add_device(struct pci_dev *dev)
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int pcibios_device_add(struct pci_dev *dev)
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{
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struct pci_dev *pdev;
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@ -632,7 +632,7 @@ static void set_dev_domain_options(struct pci_dev *pdev)
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pdev->hotplug_user_indicators = 1;
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}
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int pcibios_add_device(struct pci_dev *dev)
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int pcibios_device_add(struct pci_dev *dev)
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{
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struct pci_setup_rom *rom;
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struct irq_domain *msidom;
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@ -2116,14 +2116,14 @@ void pcim_pin_device(struct pci_dev *pdev)
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EXPORT_SYMBOL(pcim_pin_device);
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/*
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* pcibios_add_device - provide arch specific hooks when adding device dev
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* pcibios_device_add - provide arch specific hooks when adding device dev
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* @dev: the PCI device being added
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*
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* Permits the platform to provide architecture specific functionality when
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* devices are added. This is the default implementation. Architecture
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* implementations can override this.
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*/
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int __weak pcibios_add_device(struct pci_dev *dev)
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int __weak pcibios_device_add(struct pci_dev *dev)
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{
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return 0;
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}
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@ -3744,6 +3744,14 @@ int pci_enable_atomic_ops_to_root(struct pci_dev *dev, u32 cap_mask)
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struct pci_dev *bridge;
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u32 cap, ctl2;
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/*
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* Per PCIe r5.0, sec 9.3.5.10, the AtomicOp Requester Enable bit
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* in Device Control 2 is reserved in VFs and the PF value applies
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* to all associated VFs.
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*/
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if (dev->is_virtfn)
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return -EINVAL;
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if (!pci_is_pcie(dev))
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return -EINVAL;
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@ -2462,7 +2462,7 @@ static struct irq_domain *pci_dev_msi_domain(struct pci_dev *dev)
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struct irq_domain *d;
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/*
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* If a domain has been set through the pcibios_add_device()
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* If a domain has been set through the pcibios_device_add()
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* callback, then this is the one (platform code knows best).
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*/
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d = dev_get_msi_domain(&dev->dev);
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@ -2530,7 +2530,7 @@ void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
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list_add_tail(&dev->bus_list, &bus->devices);
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up_write(&pci_bus_sem);
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ret = pcibios_add_device(dev);
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ret = pcibios_device_add(dev);
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WARN_ON(ret < 0);
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/* Set up MSI IRQ domain */
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@ -2126,7 +2126,7 @@ void pcibios_disable_device(struct pci_dev *dev);
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void pcibios_set_master(struct pci_dev *dev);
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int pcibios_set_pcie_reset_state(struct pci_dev *dev,
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enum pcie_reset_state state);
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int pcibios_add_device(struct pci_dev *dev);
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int pcibios_device_add(struct pci_dev *dev);
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void pcibios_release_device(struct pci_dev *dev);
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#ifdef CONFIG_PCI
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void pcibios_penalize_isa_irq(int irq, int active);
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