From b6eac0d06b82712db8ffba36804e7e1225ce5919 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 9 Feb 2019 01:26:40 +0100 Subject: [PATCH 1/3] ARM: dts: meson8: add the internal clock measurer The Amlogic Meson8 SoC has an internal clock measurer IP which allows measuring frequencies of various clock paths. Enable it on meson8.dtsi so we can use it. Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index a9781243453e..d2ec4af82cc5 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -345,6 +345,11 @@ status = "disabled"; }; + clock-measure@8758 { + compatible = "amlogic,meson8-clk-measure"; + reg = <0x8758 0x1c>; + }; + pinctrl_cbus: pinctrl@9880 { compatible = "amlogic,meson8-cbus-pinctrl"; reg = <0x9880 0x10>; From f1975b982a2917f4fadd6af96fd1671e5dc57095 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 9 Feb 2019 01:26:41 +0100 Subject: [PATCH 2/3] ARM: dts: meson8b: add the internal clock measurer The Amlogic Meson8b SoC has an internal clock measurer IP which allows measuring frequencies of various clock paths. Enable it on meson8b.dtsi so we can use it. Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8b.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index fe84a8c3ce81..df42e48f1cc1 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -294,6 +294,11 @@ status = "disabled"; }; + clock-measure@8758 { + compatible = "amlogic,meson8b-clk-measure"; + reg = <0x8758 0x1c>; + }; + pinctrl_cbus: pinctrl@9880 { compatible = "amlogic,meson8b-cbus-pinctrl"; reg = <0x9880 0x10>; From 07f9da2900674e8e7b15b090b878d8defe223277 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 28 Mar 2019 21:47:21 +0100 Subject: [PATCH 3/3] ARM: dts: meson8b: odroidc1: add the GPIO line names This adds the GPIO line names from the schematics to get them displayed in the debugfs output of each GPIO controller. The schematics from Odroid-C1+ PCB revision 0.4 20150615 are used as referenced. Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8b-odroidc1.dts | 52 ++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts index 3b0e0f8fbc23..0157646e3a89 100644 --- a/arch/arm/boot/dts/meson8b-odroidc1.dts +++ b/arch/arm/boot/dts/meson8b-odroidc1.dts @@ -234,7 +234,59 @@ }; }; +&gpio { + gpio-line-names = /* Bank GPIOX */ + "J2 Header Pin 35", "J2 Header Pin 36", + "J2 Header Pin 32", "J2 Header Pin 31", + "J2 Header Pin 29", "J2 Header Pin 18", + "J2 Header Pin 22", "J2 Header Pin 16", + "J2 Header Pin 23", "J2 Header Pin 21", + "J2 Header Pin 19", "J2 Header Pin 33", + "J2 Header Pin 8", "J2 Header Pin 10", + "J2 Header Pin 15", "J2 Header Pin 13", + "J2 Header Pin 24", "J2 Header Pin 26", + /* Bank GPIOY */ + "Revision (upper)", "Revision (lower)", + "J2 Header Pin 7", "", "J2 Header Pin 12", + "J2 Header Pin 11", "", "", "", + "TFLASH_VDD_EN", "", "", + /* Bank GPIODV */ + "VCCK_PWM (PWM_C)", "I2CA_SDA", "I2CA_SCL", + "I2CB_SDA", "I2CB_SCL", "VDDEE_PWM (PWM_D)", + "", + /* Bank GPIOH */ + "HDMI_HPD", "HDMI_I2C_SDA", "HDMI_I2C_SCL", + "ETH_PHY_INTR", "ETH_PHY_NRST", "ETH_TXD1", + "ETH_TXD0", "ETH_TXD3", "ETH_TXD2", + "ETH_RGMII_TX_CLK", + /* Bank CARD */ + "SD_DATA1 (SDB_D1)", "SD_DATA0 (SDB_D0)", + "SD_CLK", "SD_CMD", "SD_DATA3 (SDB_D3)", + "SD_DATA2 (SDB_D2)", "SD_CDN (SD_DET_N)", + /* Bank BOOT */ + "SDC_D0 (EMMC)", "SDC_D1 (EMMC)", + "SDC_D2 (EMMC)", "SDC_D3 (EMMC)", + "SDC_D4 (EMMC)", "SDC_D5 (EMMC)", + "SDC_D6 (EMMC)", "SDC_D7 (EMMC)", + "SDC_CLK (EMMC)", "SDC_RSTn (EMMC)", + "SDC_CMD (EMMC)", "BOOT_SEL", "", "", "", + "", "", "", "", + /* Bank DIF */ + "ETH_RXD1", "ETH_RXD0", "ETH_RX_DV", + "RGMII_RX_CLK", "ETH_RXD3", "ETH_RXD2", + "ETH_TXEN", "ETH_PHY_REF_CLK_25MOUT", + "ETH_MDC", "ETH_MDIO"; +}; + &gpio_ao { + gpio-line-names = "UART TX", "UART RX", "", + "TF_3V3N_1V8_EN", "USB_HUB_RST_N", + "USB_OTG_PWREN", "J7 Header Pin 2", + "IR_IN", "J7 Header Pin 4", + "J7 Header Pin 6", "J7 Header Pin 5", + "J7 Header Pin 7", "HDMI_CEC", + "SYS_LED", "", ""; + /* * WARNING: The USB Hub on the Odroid-C1/C1+ needs a reset signal * to be turned high in order to be detected by the USB Controller.