drm/i915: Only enable DFP 4:4:4->4:2:0 conversion when outputting YCbCr 4:4:4
Let's not enable the 4:4:4->4:2:0 conversion bit in the DFP unless we're actually outputting YCbCr 4:4:4. It would appear some protocol converters blindy consult this bit even when the source is outputting RGB, resulting in a visual mess. Cc: stable@vger.kernel.org Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2914 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210111164111.13302-1-ville.syrjala@linux.intel.com Fixes:181567aa9f
("drm/i915: Do YCbCr 444->420 conversion via DP protocol converters") Reviewed-by: Jani Nikula <jani.nikula@intel.com> (cherry picked from commit3170a21f70
) Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210118154355.24453-1-ville.syrjala@linux.intel.com
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@ -3725,7 +3725,7 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
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intel_ddi_init_dp_buf_reg(encoder, crtc_state);
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if (!is_mst)
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intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
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intel_dp_configure_protocol_converter(intel_dp);
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intel_dp_configure_protocol_converter(intel_dp, crtc_state);
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intel_dp_sink_set_decompression_state(intel_dp, crtc_state,
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true);
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intel_dp_sink_set_fec_ready(intel_dp, crtc_state);
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@ -4014,7 +4014,8 @@ static void intel_dp_enable_port(struct intel_dp *intel_dp,
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intel_de_posting_read(dev_priv, intel_dp->output_reg);
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}
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void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp)
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void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state)
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{
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struct drm_i915_private *i915 = dp_to_i915(intel_dp);
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u8 tmp;
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@ -4033,8 +4034,8 @@ void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp)
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drm_dbg_kms(&i915->drm, "Failed to set protocol converter HDMI mode to %s\n",
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enableddisabled(intel_dp->has_hdmi_sink));
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tmp = intel_dp->dfp.ycbcr_444_to_420 ?
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DP_CONVERSION_TO_YCBCR420_ENABLE : 0;
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tmp = crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444 &&
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intel_dp->dfp.ycbcr_444_to_420 ? DP_CONVERSION_TO_YCBCR420_ENABLE : 0;
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if (drm_dp_dpcd_writeb(&intel_dp->aux,
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DP_PROTOCOL_CONVERTER_CONTROL_1, tmp) != 1)
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@ -4088,7 +4089,7 @@ static void intel_enable_dp(struct intel_atomic_state *state,
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}
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intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
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intel_dp_configure_protocol_converter(intel_dp);
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intel_dp_configure_protocol_converter(intel_dp, pipe_config);
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intel_dp_start_link_train(intel_dp, pipe_config);
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intel_dp_stop_link_train(intel_dp, pipe_config);
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@ -51,7 +51,8 @@ int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
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int intel_dp_retrain_link(struct intel_encoder *encoder,
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struct drm_modeset_acquire_ctx *ctx);
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void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode);
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void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp);
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void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state);
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void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state,
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bool enable);
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