mtd: nandsim: switch to exec_op interface
Stop using the legacy interface. Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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@ -299,6 +299,7 @@ union ns_mem {
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*/
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struct nandsim {
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struct nand_chip chip;
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struct nand_controller base;
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struct mtd_partition partitions[CONFIG_NANDSIM_MAX_PARTS];
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unsigned int nbparts;
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@ -645,9 +646,6 @@ static int __init init_nandsim(struct mtd_info *mtd)
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return -EIO;
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}
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/* Force mtd to not do delays */
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chip->legacy.chip_delay = 0;
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/* Initialize the NAND flash parameters */
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ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
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ns->geom.totsz = mtd->size;
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@ -2077,24 +2075,6 @@ static void ns_nand_write_byte(struct nand_chip *chip, u_char byte)
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return;
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}
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static void ns_hwcontrol(struct nand_chip *chip, int cmd, unsigned int bitmask)
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{
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struct nandsim *ns = nand_get_controller_data(chip);
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ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
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ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
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ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
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if (cmd != NAND_CMD_NONE)
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ns_nand_write_byte(chip, cmd);
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}
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static int ns_device_ready(struct nand_chip *chip)
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{
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NS_DBG("device_ready\n");
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return 1;
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}
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static void ns_nand_write_buf(struct nand_chip *chip, const u_char *buf,
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int len)
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{
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@ -2146,7 +2126,7 @@ static void ns_nand_read_buf(struct nand_chip *chip, u_char *buf, int len)
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int i;
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for (i = 0; i < len; i++)
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buf[i] = chip->legacy.read_byte(chip);
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buf[i] = ns_nand_read_byte(chip);
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return;
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}
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@ -2169,6 +2149,46 @@ static void ns_nand_read_buf(struct nand_chip *chip, u_char *buf, int len)
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return;
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}
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static int ns_exec_op(struct nand_chip *chip, const struct nand_operation *op,
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bool check_only)
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{
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int i;
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unsigned int op_id;
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const struct nand_op_instr *instr = NULL;
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struct nandsim *ns = nand_get_controller_data(chip);
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ns->lines.ce = 1;
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for (op_id = 0; op_id < op->ninstrs; op_id++) {
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instr = &op->instrs[op_id];
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ns->lines.cle = 0;
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ns->lines.ale = 0;
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switch (instr->type) {
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case NAND_OP_CMD_INSTR:
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ns->lines.cle = 1;
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ns_nand_write_byte(chip, instr->ctx.cmd.opcode);
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break;
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case NAND_OP_ADDR_INSTR:
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ns->lines.ale = 1;
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for (i = 0; i < instr->ctx.addr.naddrs; i++)
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ns_nand_write_byte(chip, instr->ctx.addr.addrs[i]);
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break;
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case NAND_OP_DATA_IN_INSTR:
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ns_nand_read_buf(chip, instr->ctx.data.buf.in, instr->ctx.data.len);
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break;
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case NAND_OP_DATA_OUT_INSTR:
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ns_nand_write_buf(chip, instr->ctx.data.buf.out, instr->ctx.data.len);
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break;
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case NAND_OP_WAITRDY_INSTR:
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/* we are always ready */
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break;
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}
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}
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return 0;
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}
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static int ns_attach_chip(struct nand_chip *chip)
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{
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unsigned int eccsteps, eccbytes;
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@ -2209,6 +2229,7 @@ static int ns_attach_chip(struct nand_chip *chip)
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static const struct nand_controller_ops ns_controller_ops = {
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.attach_chip = ns_attach_chip,
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.exec_op = ns_exec_op,
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};
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/*
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@ -2234,14 +2255,6 @@ static int __init ns_init_module(void)
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nsmtd = nand_to_mtd(chip);
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nand_set_controller_data(chip, (void *)ns);
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/*
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* Register simulator's callbacks.
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*/
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chip->legacy.cmd_ctrl = ns_hwcontrol;
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chip->legacy.read_byte = ns_nand_read_byte;
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chip->legacy.dev_ready = ns_device_ready;
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chip->legacy.write_buf = ns_nand_write_buf;
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chip->legacy.read_buf = ns_nand_read_buf;
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chip->ecc.mode = NAND_ECC_SOFT;
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chip->ecc.algo = NAND_ECC_HAMMING;
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/* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
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@ -2294,7 +2307,10 @@ static int __init ns_init_module(void)
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if ((retval = parse_gravepages()) != 0)
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goto error;
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chip->legacy.dummy_controller.ops = &ns_controller_ops;
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nand_controller_init(&ns->base);
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ns->base.ops = &ns_controller_ops;
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chip->controller = &ns->base;
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retval = nand_scan(chip, 1);
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if (retval) {
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NS_ERR("Could not scan NAND Simulator device\n");
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