dmaengine: at_hdmac: Rename "dma_common" to "dma_device"
"dma_common" name was misleading and did not suggest that's actually a struct dma_device underneath. Rename it so that readers can follow the code easier. One may see some checks and a warning when running checkpatch. Those have nothing to do with the rename and will be addressed in a further patch. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20221025090306.297886-1-tudor.ambarus@microchip.com Link: https://lore.kernel.org/r/20221025090306.297886-30-tudor.ambarus@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Tudor Ambarus
Vinod Koul
parent
d8840a7edc
commit
1c1114d850
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@ -338,7 +338,7 @@ static inline u8 convert_buswidth(enum dma_slave_buswidth addr_width)
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/**
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* struct at_dma - internal representation of an Atmel HDMA Controller
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* @chan_common: common dmaengine dma_device object members
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* @dma_device: dmaengine dma_device object members
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* @atdma_devtype: identifier of DMA controller compatibility
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* @ch_regs: memory mapped register base
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* @clk: dma controller clock
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@ -348,7 +348,7 @@ static inline u8 convert_buswidth(enum dma_slave_buswidth addr_width)
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* @chan: channels table to store at_dma_chan structures
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*/
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struct at_dma {
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struct dma_device dma_common;
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struct dma_device dma_device;
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void __iomem *regs;
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struct clk *clk;
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u32 save_imr;
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@ -368,7 +368,7 @@ struct at_dma {
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static inline struct at_dma *to_at_dma(struct dma_device *ddev)
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{
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return container_of(ddev, struct at_dma, dma_common);
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return container_of(ddev, struct at_dma, dma_device);
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}
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@ -1069,11 +1069,11 @@ static irqreturn_t at_dma_interrupt(int irq, void *dev_id)
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if (!pending)
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break;
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dev_vdbg(atdma->dma_common.dev,
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dev_vdbg(atdma->dma_device.dev,
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"interrupt: status = 0x%08x, 0x%08x, 0x%08x\n",
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status, imr, pending);
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for (i = 0; i < atdma->dma_common.chancnt; i++) {
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for (i = 0; i < atdma->dma_device.chancnt; i++) {
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atchan = &atdma->chan[i];
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if (pending & (AT_DMA_BTC(i) | AT_DMA_ERR(i))) {
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if (pending & AT_DMA_ERR(i)) {
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@ -2000,7 +2000,7 @@ static int atc_alloc_chan_resources(struct dma_chan *chan)
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* We need controller-specific data to set up slave
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* transfers.
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*/
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BUG_ON(!atslave->dma_dev || atslave->dma_dev != atdma->dma_common.dev);
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BUG_ON(!atslave->dma_dev || atslave->dma_dev != atdma->dma_device.dev);
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/* if cfg configuration specified take it instead of default */
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if (atslave->cfg)
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@ -2011,7 +2011,7 @@ static int atc_alloc_chan_resources(struct dma_chan *chan)
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for (i = 0; i < init_nr_desc_per_channel; i++) {
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desc = atc_alloc_descriptor(chan, GFP_KERNEL);
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if (!desc) {
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dev_err(atdma->dma_common.dev,
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dev_err(atdma->dma_device.dev,
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"Only %d initial descriptors\n", i);
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break;
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}
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@ -2255,7 +2255,7 @@ static int __init at_dma_probe(struct platform_device *pdev)
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return irq;
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/* discover transaction capabilities */
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atdma->dma_common.cap_mask = plat_dat->cap_mask;
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atdma->dma_device.cap_mask = plat_dat->cap_mask;
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atdma->all_chan_mask = (1 << plat_dat->nr_channels) - 1;
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atdma->clk = devm_clk_get(&pdev->dev, "dma_clk");
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@ -2299,16 +2299,16 @@ static int __init at_dma_probe(struct platform_device *pdev)
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cpu_relax();
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/* initialize channels related values */
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INIT_LIST_HEAD(&atdma->dma_common.channels);
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INIT_LIST_HEAD(&atdma->dma_device.channels);
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for (i = 0; i < plat_dat->nr_channels; i++) {
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struct at_dma_chan *atchan = &atdma->chan[i];
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atchan->mem_if = AT_DMA_MEM_IF;
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atchan->per_if = AT_DMA_PER_IF;
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atchan->chan_common.device = &atdma->dma_common;
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atchan->chan_common.device = &atdma->dma_device;
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dma_cookie_init(&atchan->chan_common);
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list_add_tail(&atchan->chan_common.device_node,
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&atdma->dma_common.channels);
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&atdma->dma_device.channels);
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atchan->ch_regs = atdma->regs + ch_regs(i);
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spin_lock_init(&atchan->lock);
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@ -2323,49 +2323,49 @@ static int __init at_dma_probe(struct platform_device *pdev)
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}
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/* set base routines */
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atdma->dma_common.device_alloc_chan_resources = atc_alloc_chan_resources;
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atdma->dma_common.device_free_chan_resources = atc_free_chan_resources;
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atdma->dma_common.device_tx_status = atc_tx_status;
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atdma->dma_common.device_issue_pending = atc_issue_pending;
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atdma->dma_common.dev = &pdev->dev;
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atdma->dma_device.device_alloc_chan_resources = atc_alloc_chan_resources;
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atdma->dma_device.device_free_chan_resources = atc_free_chan_resources;
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atdma->dma_device.device_tx_status = atc_tx_status;
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atdma->dma_device.device_issue_pending = atc_issue_pending;
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atdma->dma_device.dev = &pdev->dev;
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/* set prep routines based on capability */
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if (dma_has_cap(DMA_INTERLEAVE, atdma->dma_common.cap_mask))
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atdma->dma_common.device_prep_interleaved_dma = atc_prep_dma_interleaved;
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if (dma_has_cap(DMA_INTERLEAVE, atdma->dma_device.cap_mask))
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atdma->dma_device.device_prep_interleaved_dma = atc_prep_dma_interleaved;
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if (dma_has_cap(DMA_MEMCPY, atdma->dma_common.cap_mask))
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atdma->dma_common.device_prep_dma_memcpy = atc_prep_dma_memcpy;
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if (dma_has_cap(DMA_MEMCPY, atdma->dma_device.cap_mask))
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atdma->dma_device.device_prep_dma_memcpy = atc_prep_dma_memcpy;
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if (dma_has_cap(DMA_MEMSET, atdma->dma_common.cap_mask)) {
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atdma->dma_common.device_prep_dma_memset = atc_prep_dma_memset;
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atdma->dma_common.device_prep_dma_memset_sg = atc_prep_dma_memset_sg;
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atdma->dma_common.fill_align = DMAENGINE_ALIGN_4_BYTES;
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if (dma_has_cap(DMA_MEMSET, atdma->dma_device.cap_mask)) {
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atdma->dma_device.device_prep_dma_memset = atc_prep_dma_memset;
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atdma->dma_device.device_prep_dma_memset_sg = atc_prep_dma_memset_sg;
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atdma->dma_device.fill_align = DMAENGINE_ALIGN_4_BYTES;
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}
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if (dma_has_cap(DMA_SLAVE, atdma->dma_common.cap_mask)) {
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atdma->dma_common.device_prep_slave_sg = atc_prep_slave_sg;
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if (dma_has_cap(DMA_SLAVE, atdma->dma_device.cap_mask)) {
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atdma->dma_device.device_prep_slave_sg = atc_prep_slave_sg;
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/* controller can do slave DMA: can trigger cyclic transfers */
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dma_cap_set(DMA_CYCLIC, atdma->dma_common.cap_mask);
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atdma->dma_common.device_prep_dma_cyclic = atc_prep_dma_cyclic;
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atdma->dma_common.device_config = atc_config;
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atdma->dma_common.device_pause = atc_pause;
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atdma->dma_common.device_resume = atc_resume;
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atdma->dma_common.device_terminate_all = atc_terminate_all;
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atdma->dma_common.src_addr_widths = ATC_DMA_BUSWIDTHS;
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atdma->dma_common.dst_addr_widths = ATC_DMA_BUSWIDTHS;
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atdma->dma_common.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
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atdma->dma_common.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
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dma_cap_set(DMA_CYCLIC, atdma->dma_device.cap_mask);
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atdma->dma_device.device_prep_dma_cyclic = atc_prep_dma_cyclic;
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atdma->dma_device.device_config = atc_config;
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atdma->dma_device.device_pause = atc_pause;
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atdma->dma_device.device_resume = atc_resume;
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atdma->dma_device.device_terminate_all = atc_terminate_all;
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atdma->dma_device.src_addr_widths = ATC_DMA_BUSWIDTHS;
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atdma->dma_device.dst_addr_widths = ATC_DMA_BUSWIDTHS;
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atdma->dma_device.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
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atdma->dma_device.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
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}
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dma_writel(atdma, EN, AT_DMA_ENABLE);
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dev_info(&pdev->dev, "Atmel AHB DMA Controller ( %s%s%s), %d channels\n",
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dma_has_cap(DMA_MEMCPY, atdma->dma_common.cap_mask) ? "cpy " : "",
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dma_has_cap(DMA_MEMSET, atdma->dma_common.cap_mask) ? "set " : "",
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dma_has_cap(DMA_SLAVE, atdma->dma_common.cap_mask) ? "slave " : "",
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dma_has_cap(DMA_MEMCPY, atdma->dma_device.cap_mask) ? "cpy " : "",
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dma_has_cap(DMA_MEMSET, atdma->dma_device.cap_mask) ? "set " : "",
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dma_has_cap(DMA_SLAVE, atdma->dma_device.cap_mask) ? "slave " : "",
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plat_dat->nr_channels);
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err = dma_async_device_register(&atdma->dma_common);
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err = dma_async_device_register(&atdma->dma_device);
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if (err) {
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dev_err(&pdev->dev, "Unable to register: %d.\n", err);
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goto err_dma_async_device_register;
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@ -2388,7 +2388,7 @@ static int __init at_dma_probe(struct platform_device *pdev)
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return 0;
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err_of_dma_controller_register:
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dma_async_device_unregister(&atdma->dma_common);
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dma_async_device_unregister(&atdma->dma_device);
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err_dma_async_device_register:
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dma_pool_destroy(atdma->memset_pool);
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err_memset_pool_create:
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@ -2408,13 +2408,13 @@ static int at_dma_remove(struct platform_device *pdev)
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at_dma_off(atdma);
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if (pdev->dev.of_node)
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of_dma_controller_free(pdev->dev.of_node);
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dma_async_device_unregister(&atdma->dma_common);
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dma_async_device_unregister(&atdma->dma_device);
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dma_pool_destroy(atdma->memset_pool);
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dma_pool_destroy(atdma->dma_desc_pool);
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free_irq(platform_get_irq(pdev, 0), atdma);
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list_for_each_entry_safe(chan, _chan, &atdma->dma_common.channels,
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list_for_each_entry_safe(chan, _chan, &atdma->dma_device.channels,
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device_node) {
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struct at_dma_chan *atchan = to_at_dma_chan(chan);
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@ -2443,7 +2443,7 @@ static int at_dma_prepare(struct device *dev)
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struct at_dma *atdma = dev_get_drvdata(dev);
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struct dma_chan *chan, *_chan;
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list_for_each_entry_safe(chan, _chan, &atdma->dma_common.channels,
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list_for_each_entry_safe(chan, _chan, &atdma->dma_device.channels,
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device_node) {
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struct at_dma_chan *atchan = to_at_dma_chan(chan);
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/* wait for transaction completion (except in cyclic case) */
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@ -2478,7 +2478,7 @@ static int at_dma_suspend_noirq(struct device *dev)
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struct dma_chan *chan, *_chan;
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/* preserve data */
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list_for_each_entry_safe(chan, _chan, &atdma->dma_common.channels,
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list_for_each_entry_safe(chan, _chan, &atdma->dma_device.channels,
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device_node) {
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struct at_dma_chan *atchan = to_at_dma_chan(chan);
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@ -2528,7 +2528,7 @@ static int at_dma_resume_noirq(struct device *dev)
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/* restore saved data */
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dma_writel(atdma, EBCIER, atdma->save_imr);
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list_for_each_entry_safe(chan, _chan, &atdma->dma_common.channels,
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list_for_each_entry_safe(chan, _chan, &atdma->dma_device.channels,
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device_node) {
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struct at_dma_chan *atchan = to_at_dma_chan(chan);
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