ath9k_hw: fix incorrect LNA register settings
After a full reset, mci_reset will put LNA update to the setting for 2G mode. Those registers need to be forced to update when the channel is in 5G. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -1013,38 +1013,32 @@ static void ar9003_mci_queue_unsent_gpm(struct ath_hw *ah, u8 header,
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}
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}
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void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool wait_done)
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void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool force)
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{
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struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
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if (!mci->update_2g5g)
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if (!mci->update_2g5g && !force)
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return;
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if (mci->is_2g) {
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ar9003_mci_send_2g5g_status(ah, true);
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ar9003_mci_send_lna_transfer(ah, true);
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udelay(5);
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REG_CLR_BIT(ah, AR_MCI_TX_CTRL,
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REG_SET_BIT(ah, AR_MCI_TX_CTRL,
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AR_MCI_TX_CTRL_DISABLE_LNA_UPDATE);
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REG_CLR_BIT(ah, AR_PHY_GLB_CONTROL,
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AR_BTCOEX_CTRL_BT_OWN_SPDT_CTRL);
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if (!(mci->config & ATH_MCI_CONFIG_DISABLE_OSLA))
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REG_SET_BIT(ah, AR_BTCOEX_CTRL,
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AR_BTCOEX_CTRL_ONE_STEP_LOOK_AHEAD_EN);
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ar9003_mci_osla_setup(ah, true);
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} else {
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ar9003_mci_send_lna_take(ah, true);
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udelay(5);
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REG_SET_BIT(ah, AR_MCI_TX_CTRL,
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AR_MCI_TX_CTRL_DISABLE_LNA_UPDATE);
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REG_SET_BIT(ah, AR_PHY_GLB_CONTROL,
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AR_BTCOEX_CTRL_BT_OWN_SPDT_CTRL);
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REG_CLR_BIT(ah, AR_BTCOEX_CTRL,
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AR_BTCOEX_CTRL_ONE_STEP_LOOK_AHEAD_EN);
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ar9003_mci_send_2g5g_status(ah, true);
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ar9003_mci_osla_setup(ah, false);
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if (!force)
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ar9003_mci_send_2g5g_status(ah, true);
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}
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}
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@ -1313,7 +1307,7 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type, u32 *p_data)
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if (mci->unhalt_bt_gpm)
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ar9003_mci_send_coex_halt_bt_gpm(ah, false, true);
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ar9003_mci_2g5g_switch(ah, true);
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ar9003_mci_2g5g_switch(ah, false);
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break;
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case MCI_STATE_SET_BT_CAL_START:
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mci->bt_state = MCI_BT_CAL_START;
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@ -1394,7 +1388,7 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type, u32 *p_data)
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mci->query_bt = true;
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mci->need_flush_btinfo = true;
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ar9003_mci_send_coex_wlan_channels(ah, true);
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ar9003_mci_2g5g_switch(ah, true);
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ar9003_mci_2g5g_switch(ah, false);
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break;
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case MCI_STATE_NEED_FTP_STOMP:
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value = !(mci->config & ATH_MCI_CONFIG_DISABLE_FTP_STOMP);
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@ -276,7 +276,7 @@ void ar9003_mci_stop_bt(struct ath_hw *ah, bool save_fullsleep);
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void ar9003_mci_init_cal_req(struct ath_hw *ah, bool *is_reusable);
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void ar9003_mci_init_cal_done(struct ath_hw *ah);
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void ar9003_mci_set_full_sleep(struct ath_hw *ah);
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void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool wait_done);
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void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool force);
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void ar9003_mci_check_bt(struct ath_hw *ah);
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bool ar9003_mci_start_reset(struct ath_hw *ah, struct ath9k_channel *chan);
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int ar9003_mci_end_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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@ -1711,7 +1711,7 @@ static int ath9k_hw_do_fastcc(struct ath_hw *ah, struct ath9k_channel *chan)
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ath9k_hw_start_nfcal(ah, true);
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if (ath9k_hw_mci_is_enabled(ah))
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ar9003_mci_2g5g_switch(ah, true);
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ar9003_mci_2g5g_switch(ah, false);
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if (AR_SREV_9271(ah))
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ar9002_hw_load_ani_reg(ah, chan);
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