mlxsw: reg: Port Diagnostics Database Register
The PDDR register enables to read the Phy debug database. Signed-off-by: Amit Cohen <amitc@mellanox.com> Reviewed-by: Petr Machata <petrm@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -5438,6 +5438,56 @@ static inline void mlxsw_reg_pplr_pack(char *payload, u8 local_port,
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MLXSW_REG_PPLR_LB_TYPE_BIT_PHY_LOCAL : 0);
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}
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/* PDDR - Port Diagnostics Database Register
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* -----------------------------------------
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* The PDDR enables to read the Phy debug database
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*/
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#define MLXSW_REG_PDDR_ID 0x5031
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#define MLXSW_REG_PDDR_LEN 0x100
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MLXSW_REG_DEFINE(pddr, MLXSW_REG_PDDR_ID, MLXSW_REG_PDDR_LEN);
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/* reg_pddr_local_port
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* Local port number.
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* Access: Index
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*/
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MLXSW_ITEM32(reg, pddr, local_port, 0x00, 16, 8);
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enum mlxsw_reg_pddr_page_select {
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MLXSW_REG_PDDR_PAGE_SELECT_TROUBLESHOOTING_INFO = 1,
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};
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/* reg_pddr_page_select
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* Page select index.
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* Access: Index
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*/
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MLXSW_ITEM32(reg, pddr, page_select, 0x04, 0, 8);
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enum mlxsw_reg_pddr_trblsh_group_opcode {
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/* Monitor opcodes */
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MLXSW_REG_PDDR_TRBLSH_GROUP_OPCODE_MONITOR,
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};
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/* reg_pddr_group_opcode
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* Group selector.
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* Access: Index
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*/
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MLXSW_ITEM32(reg, pddr, trblsh_group_opcode, 0x08, 0, 16);
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/* reg_pddr_status_opcode
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* Group selector.
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* Access: RO
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*/
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MLXSW_ITEM32(reg, pddr, trblsh_status_opcode, 0x0C, 0, 16);
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static inline void mlxsw_reg_pddr_pack(char *payload, u8 local_port,
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u8 page_select)
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{
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MLXSW_REG_ZERO(pddr, payload);
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mlxsw_reg_pddr_local_port_set(payload, local_port);
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mlxsw_reg_pddr_page_select_set(payload, page_select);
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}
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/* PMTM - Port Module Type Mapping Register
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* ----------------------------------------
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* The PMTM allows query or configuration of module types.
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@ -10758,6 +10808,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
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MLXSW_REG(pbmc),
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MLXSW_REG(pspa),
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MLXSW_REG(pplr),
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MLXSW_REG(pddr),
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MLXSW_REG(pmtm),
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MLXSW_REG(htgt),
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MLXSW_REG(hpkt),
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