be2net: fix access to SEMAPHORE reg
The SEMAPHORE register was being accessed from the csr BAR space. This BAR may not be available in some Skyhawk-R configurations. Instead, access this register via the PCI config space (it's available there too). Signed-off-by: Sathya Perla <sathya.perla@emulex.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -348,7 +348,6 @@ struct be_adapter {
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struct pci_dev *pdev;
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struct net_device *netdev;
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u8 __iomem *csr;
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u8 __iomem *db; /* Door Bell */
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struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
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@ -468,14 +468,13 @@ static int be_mbox_notify_wait(struct be_adapter *adapter)
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static int be_POST_stage_get(struct be_adapter *adapter, u16 *stage)
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{
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u32 sem;
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u32 reg = skyhawk_chip(adapter) ? SLIPORT_SEMAPHORE_OFFSET_SH :
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SLIPORT_SEMAPHORE_OFFSET_BE;
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if (lancer_chip(adapter))
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sem = ioread32(adapter->db + MPU_EP_SEMAPHORE_IF_TYPE2_OFFSET);
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else
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sem = ioread32(adapter->csr + MPU_EP_SEMAPHORE_OFFSET);
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pci_read_config_dword(adapter->pdev, reg, &sem);
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*stage = sem & POST_STAGE_MASK;
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*stage = sem & EP_SEMAPHORE_POST_STAGE_MASK;
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if ((sem >> EP_SEMAPHORE_POST_ERR_SHIFT) & EP_SEMAPHORE_POST_ERR_MASK)
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if ((sem >> POST_ERR_SHIFT) & POST_ERR_MASK)
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return -1;
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else
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return 0;
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@ -31,12 +31,12 @@
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#define MPU_EP_CONTROL 0
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/********** MPU semphore ******************/
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#define MPU_EP_SEMAPHORE_OFFSET 0xac
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#define MPU_EP_SEMAPHORE_IF_TYPE2_OFFSET 0x400
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#define EP_SEMAPHORE_POST_STAGE_MASK 0x0000FFFF
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#define EP_SEMAPHORE_POST_ERR_MASK 0x1
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#define EP_SEMAPHORE_POST_ERR_SHIFT 31
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/********** MPU semphore: used for SH & BE *************/
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#define SLIPORT_SEMAPHORE_OFFSET_BE 0x7c
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#define SLIPORT_SEMAPHORE_OFFSET_SH 0x94
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#define POST_STAGE_MASK 0x0000FFFF
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#define POST_ERR_MASK 0x1
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#define POST_ERR_SHIFT 31
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/* MPU semphore POST stage values */
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#define POST_STAGE_AWAITING_HOST_RDY 0x1 /* FW awaiting goahead from host */
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@ -3619,8 +3619,6 @@ static void be_netdev_init(struct net_device *netdev)
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static void be_unmap_pci_bars(struct be_adapter *adapter)
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{
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if (adapter->csr)
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pci_iounmap(adapter->pdev, adapter->csr);
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if (adapter->db)
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pci_iounmap(adapter->pdev, adapter->db);
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if (adapter->roce_db.base)
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@ -3668,13 +3666,6 @@ static int be_map_pci_bars(struct be_adapter *adapter)
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adapter->if_type = (sli_intf & SLI_INTF_IF_TYPE_MASK) >>
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SLI_INTF_IF_TYPE_SHIFT;
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if (be_physfn(adapter) && !lancer_chip(adapter)) {
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addr = pci_iomap(adapter->pdev, 2, 0);
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if (addr == NULL)
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return -ENOMEM;
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adapter->csr = addr;
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}
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addr = pci_iomap(adapter->pdev, db_bar(adapter), 0);
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if (addr == NULL)
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goto pci_map_err;
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