clk: qcom: msm8996-cpu: Rename DIV_2_INDEX to SMUX_INDEX
The parent at this index is the secondary mux, which can connect not only to primary PLL/2 but also to XO. Rename the index to SMUX_INDEX to better reflect the parent. Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220621160621.24415-2-y.oudjana@protonmail.com
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@ -61,7 +61,7 @@
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#include "clk-regmap.h"
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enum _pmux_input {
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DIV_2_INDEX = 0,
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SMUX_INDEX = 0,
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PLL_INDEX,
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ACD_INDEX,
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ALT_INDEX,
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@ -468,7 +468,7 @@ static int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event,
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case POST_RATE_CHANGE:
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if (cnd->new_rate < DIV_2_THRESHOLD)
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ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw,
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DIV_2_INDEX);
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SMUX_INDEX);
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else
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ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw,
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ACD_INDEX);
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