This pull request contains fixes for the following issues
1) Fix two instances of infinite loop occurring in clock list for DA850. This fixes kernel hangs in some instances and so have been marked for stable kernel. 2) Fix for sleeping function called from atomic context with USB 2.0 clock management code introduced in v4.10 merge window. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJYbOM8AAoJEGFBu2jqvgRNxTIP/iRuN6cWbJLNB/X7+Pj0LZOJ aTOhvPB1wt0raMc93a63DamaD9Y274IDnn/dKh55VBzC3Ctn7sbihOcoOkksHOfj 6u4oYld1uDpcqzY4IgpxShZzRDNLWYWhKvZwRNwv9XBwFqwM5PCLkdBgr7/Obwcf 69ziK9IyErmruZCnsOCeeG7YaOPA3reOvEq+1wS9Hy7V1Dh0DERdU9dx3SmHi3Jp CBpx7mdaF/VYTyhlTAuKS+VZYiVbGW53rVMNVcNxoPVnh/eDuafgqoXW6U87fmcM d3SOQlcrd/dneIFej2Y0v6ppqyw1XB5PXRJCcK2YPIBz2lHiviEtnfct6HIqWD53 tl+I1GNgoHihxcSqsy8y4d55SLnbfCvz0JVr6PvncObOqDee/6LL0dovqRuHzFKT fyWviWujRzmeDb8sPElyxWdOvofM+4akETwGfCq2IrL15yNW5EYPAQxhbZezuWFM X/hXLUP1NXysHNltJMmvyxTTQH7DfpPFX+Ct5vb7Uqkq+LhAgtuoZrxQFaYJP28P 4wIe2XXt6ZsHAbHA7TdnaJMDY+/WzsGz7rEeebzw1xRPMkkV7NUbyx+5gQPGuLDm duvLxdG6mt0nzPOFw8v5ShB8GTFm2iD8S8CRoOxIfF/JVtn1YJCE/w395XSWBPjj NgqTMhuP+CV2jHBkMYlS =mX5P -----END PGP SIGNATURE----- Merge tag 'davinci-fixes-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into fixes Pull "DaVinci fixes for v4.10" from Sekhar Nori: This pull request contains fixes for the following issues 1) Fix two instances of infinite loop occurring in clock list for DA850. This fixes kernel hangs in some instances and so have been marked for stable kernel. 2) Fix for sleeping function called from atomic context with USB 2.0 clock management code introduced in v4.10 merge window. * tag 'davinci-fixes-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: da8xx: Fix sleeping function called from invalid context ARM: davinci: Make __clk_{enable,disable} functions public ARM: davinci: da850: don't add emac clock to lookup table twice ARM: davinci: da850: fix infinite loop in clk_set_rate()
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commit
1b9ec81258
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@ -31,10 +31,10 @@ static LIST_HEAD(clocks);
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static DEFINE_MUTEX(clocks_mutex);
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static DEFINE_SPINLOCK(clockfw_lock);
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static void __clk_enable(struct clk *clk)
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void davinci_clk_enable(struct clk *clk)
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{
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if (clk->parent)
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__clk_enable(clk->parent);
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davinci_clk_enable(clk->parent);
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if (clk->usecount++ == 0) {
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if (clk->flags & CLK_PSC)
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davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
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@ -44,7 +44,7 @@ static void __clk_enable(struct clk *clk)
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}
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}
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static void __clk_disable(struct clk *clk)
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void davinci_clk_disable(struct clk *clk)
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{
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if (WARN_ON(clk->usecount == 0))
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return;
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@ -56,7 +56,7 @@ static void __clk_disable(struct clk *clk)
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clk->clk_disable(clk);
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}
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if (clk->parent)
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__clk_disable(clk->parent);
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davinci_clk_disable(clk->parent);
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}
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int davinci_clk_reset(struct clk *clk, bool reset)
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@ -103,7 +103,7 @@ int clk_enable(struct clk *clk)
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return -EINVAL;
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spin_lock_irqsave(&clockfw_lock, flags);
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__clk_enable(clk);
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davinci_clk_enable(clk);
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spin_unlock_irqrestore(&clockfw_lock, flags);
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return 0;
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@ -118,7 +118,7 @@ void clk_disable(struct clk *clk)
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return;
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spin_lock_irqsave(&clockfw_lock, flags);
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__clk_disable(clk);
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davinci_clk_disable(clk);
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spin_unlock_irqrestore(&clockfw_lock, flags);
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}
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EXPORT_SYMBOL(clk_disable);
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@ -132,6 +132,8 @@ int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
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int davinci_set_refclk_rate(unsigned long rate);
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int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
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int davinci_clk_reset(struct clk *clk, bool reset);
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void davinci_clk_enable(struct clk *clk);
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void davinci_clk_disable(struct clk *clk);
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extern struct platform_device davinci_wdt_device;
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extern void davinci_watchdog_reset(struct platform_device *);
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@ -319,6 +319,16 @@ static struct clk emac_clk = {
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.gpsc = 1,
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};
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/*
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* In order to avoid adding the emac_clk to the clock lookup table twice (and
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* screwing up the linked list in the process) create a separate clock for
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* mdio inheriting the rate from emac_clk.
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*/
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static struct clk mdio_clk = {
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.name = "mdio",
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.parent = &emac_clk,
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};
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static struct clk mcasp_clk = {
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.name = "mcasp",
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.parent = &async3_clk,
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@ -367,6 +377,16 @@ static struct clk aemif_clk = {
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.flags = ALWAYS_ENABLED,
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};
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/*
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* In order to avoid adding the aemif_clk to the clock lookup table twice (and
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* screwing up the linked list in the process) create a separate clock for
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* nand inheriting the rate from aemif_clk.
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*/
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static struct clk aemif_nand_clk = {
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.name = "nand",
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.parent = &aemif_clk,
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};
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static struct clk usb11_clk = {
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.name = "usb11",
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.parent = &pll0_sysclk4,
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@ -529,7 +549,7 @@ static struct clk_lookup da850_clks[] = {
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CLK(NULL, "arm", &arm_clk),
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CLK(NULL, "rmii", &rmii_clk),
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CLK("davinci_emac.1", NULL, &emac_clk),
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CLK("davinci_mdio.0", "fck", &emac_clk),
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CLK("davinci_mdio.0", "fck", &mdio_clk),
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CLK("davinci-mcasp.0", NULL, &mcasp_clk),
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CLK("davinci-mcbsp.0", NULL, &mcbsp0_clk),
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CLK("davinci-mcbsp.1", NULL, &mcbsp1_clk),
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@ -537,7 +557,15 @@ static struct clk_lookup da850_clks[] = {
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CLK("da830-mmc.0", NULL, &mmcsd0_clk),
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CLK("da830-mmc.1", NULL, &mmcsd1_clk),
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CLK("ti-aemif", NULL, &aemif_clk),
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CLK(NULL, "aemif", &aemif_clk),
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/*
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* The only user of this clock is davinci_nand and it get's it through
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* con_id. The nand node itself is created from within the aemif
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* driver to guarantee that it's probed after the aemif timing
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* parameters are configured. of_dev_auxdata is not accessible from
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* the aemif driver and can't be passed to of_platform_populate(). For
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* that reason we're leaving the dev_id here as NULL.
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*/
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CLK(NULL, "aemif", &aemif_nand_clk),
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CLK("ohci-da8xx", "usb11", &usb11_clk),
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CLK("musb-da8xx", "usb20", &usb20_clk),
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CLK("spi_davinci.0", NULL, &spi0_clk),
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@ -22,6 +22,8 @@
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#define DA8XX_USB0_BASE 0x01e00000
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#define DA8XX_USB1_BASE 0x01e25000
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static struct clk *usb20_clk;
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static struct platform_device da8xx_usb_phy = {
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.name = "da8xx-usb-phy",
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.id = -1,
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@ -158,26 +160,13 @@ int __init da8xx_register_usb_refclkin(int rate)
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static void usb20_phy_clk_enable(struct clk *clk)
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{
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struct clk *usb20_clk;
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int err;
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u32 val;
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u32 timeout = 500000; /* 500 msec */
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val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
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usb20_clk = clk_get(&da8xx_usb20_dev.dev, "usb20");
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if (IS_ERR(usb20_clk)) {
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pr_err("could not get usb20 clk: %ld\n", PTR_ERR(usb20_clk));
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return;
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}
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/* The USB 2.O PLL requires that the USB 2.O PSC is enabled as well. */
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err = clk_prepare_enable(usb20_clk);
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if (err) {
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pr_err("failed to enable usb20 clk: %d\n", err);
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clk_put(usb20_clk);
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return;
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}
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davinci_clk_enable(usb20_clk);
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/*
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* Turn on the USB 2.0 PHY, but just the PLL, and not OTG. The USB 1.1
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@ -197,8 +186,7 @@ static void usb20_phy_clk_enable(struct clk *clk)
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pr_err("Timeout waiting for USB 2.0 PHY clock good\n");
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done:
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clk_disable_unprepare(usb20_clk);
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clk_put(usb20_clk);
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davinci_clk_disable(usb20_clk);
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}
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static void usb20_phy_clk_disable(struct clk *clk)
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@ -285,11 +273,19 @@ static struct clk_lookup usb20_phy_clk_lookup =
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int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin)
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{
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struct clk *parent;
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int ret = 0;
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int ret;
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usb20_clk = clk_get(&da8xx_usb20_dev.dev, "usb20");
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ret = PTR_ERR_OR_ZERO(usb20_clk);
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if (ret)
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return ret;
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parent = clk_get(NULL, use_usb_refclkin ? "usb_refclkin" : "pll0_aux");
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if (IS_ERR(parent))
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return PTR_ERR(parent);
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ret = PTR_ERR_OR_ZERO(parent);
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if (ret) {
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clk_put(usb20_clk);
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return ret;
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}
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usb20_phy_clk.parent = parent;
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ret = clk_register(&usb20_phy_clk);
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