mmc: sdhci-pci-o2micro: Bug fix for SDR104 HW tuning failure
Force chip enter L0 power state during SDR104 HW tuning to avoid tuning failure
Signed-off-by: Shirley Her <shirley.her@bayhubtech.com>
Link: https://lore.kernel.org/r/20210206014051.3418-1-shirley.her@bayhubtech.com
Fixes: 7b7d897e88
("mmc: sdhci-pci-o2micro: Add HW tuning for SDR104 mode")
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -33,6 +33,8 @@
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#define O2_SD_ADMA2 0xE7
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#define O2_SD_INF_MOD 0xF1
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#define O2_SD_MISC_CTRL4 0xFC
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#define O2_SD_MISC_CTRL 0x1C0
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#define O2_SD_PWR_FORCE_L0 0x0002
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#define O2_SD_TUNING_CTRL 0x300
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#define O2_SD_PLL_SETTING 0x304
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#define O2_SD_MISC_SETTING 0x308
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@ -300,6 +302,8 @@ static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode)
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{
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struct sdhci_host *host = mmc_priv(mmc);
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int current_bus_width = 0;
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u32 scratch32 = 0;
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u16 scratch = 0;
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/*
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* This handler only implements the eMMC tuning that is specific to
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@ -312,6 +316,17 @@ static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode)
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if (WARN_ON((opcode != MMC_SEND_TUNING_BLOCK_HS200) &&
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(opcode != MMC_SEND_TUNING_BLOCK)))
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return -EINVAL;
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/* Force power mode enter L0 */
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scratch = sdhci_readw(host, O2_SD_MISC_CTRL);
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scratch |= O2_SD_PWR_FORCE_L0;
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sdhci_writew(host, scratch, O2_SD_MISC_CTRL);
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/* wait DLL lock, timeout value 5ms */
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if (readx_poll_timeout(sdhci_o2_pll_dll_wdt_control, host,
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scratch32, (scratch32 & O2_DLL_LOCK_STATUS), 1, 5000))
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pr_warn("%s: DLL can't lock in 5ms after force L0 during tuning.\n",
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mmc_hostname(host->mmc));
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/*
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* Judge the tuning reason, whether caused by dll shift
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* If cause by dll shift, should call sdhci_o2_dll_recovery
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@ -344,6 +359,11 @@ static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode)
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sdhci_set_bus_width(host, current_bus_width);
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}
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/* Cancel force power mode enter L0 */
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scratch = sdhci_readw(host, O2_SD_MISC_CTRL);
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scratch &= ~(O2_SD_PWR_FORCE_L0);
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sdhci_writew(host, scratch, O2_SD_MISC_CTRL);
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sdhci_reset(host, SDHCI_RESET_CMD);
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sdhci_reset(host, SDHCI_RESET_DATA);
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