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ARM: dts: realview: Update spi clock-names property 

Now that spi pl022 binding only accept "sspclk" as clock name, realview
platforms with "SSPCLK" clock name start raising dtbs_check warnings.
Make necessary changes to update this property in order to make it
compliant with binding.

clock-names:0: 'sspclk' was expected

Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Link: https://lore.kernel.org/r/20220312113853.63446-3-singh.kuldeep87k@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Kuldeep Singh 2022-03-12 17:08:51 +05:30 committed by Linus Walleij
parent ba35187559
commit 1aa156f2a8
4 changed files with 4 additions and 4 deletions
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2
arch/arm/boot/dts/arm-realview-eb.dtsi
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@ -399,7 +399,7 @@
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x1000d000 0x1000>; reg = <0x1000d000 0x1000>;
clocks = <&sspclk>, <&pclk>; clocks = <&sspclk>, <&pclk>;
clock-names = "SSPCLK", "apb_pclk"; clock-names = "sspclk", "apb_pclk";
}; };
wdog: watchdog@10010000 { wdog: watchdog@10010000 {

2
arch/arm/boot/dts/arm-realview-pb1176.dts
View File

@ -410,7 +410,7 @@
interrupt-parent = <&intc_dc1176>; interrupt-parent = <&intc_dc1176>;
interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sspclk>, <&pclk>; clocks = <&sspclk>, <&pclk>;
clock-names = "SSPCLK", "apb_pclk"; clock-names = "sspclk", "apb_pclk";
}; };
pb1176_serial0: serial@1010c000 { pb1176_serial0: serial@1010c000 {

2
arch/arm/boot/dts/arm-realview-pb11mp.dts
View File

@ -555,7 +555,7 @@
interrupt-parent = <&intc_pb11mp>; interrupt-parent = <&intc_pb11mp>;
interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sspclk>, <&pclk>; clocks = <&sspclk>, <&pclk>;
clock-names = "SSPCLK", "apb_pclk"; clock-names = "sspclk", "apb_pclk";
}; };
watchdog@1000f000 { watchdog@1000f000 {

2
arch/arm/boot/dts/arm-realview-pbx.dtsi
View File

@ -390,7 +390,7 @@
compatible = "arm,pl022", "arm,primecell"; compatible = "arm,pl022", "arm,primecell";
reg = <0x1000d000 0x1000>; reg = <0x1000d000 0x1000>;
clocks = <&sspclk>, <&pclk>; clocks = <&sspclk>, <&pclk>;
clock-names = "SSPCLK", "apb_pclk"; clock-names = "sspclk", "apb_pclk";
}; };
wdog0: watchdog@1000f000 { wdog0: watchdog@1000f000 {