Revert "drm/amdgpu/gmc11: enable AGP aperture"
This reverts commit 2cfe34e189
.
Enable AGP aperture cause SDMA page fault for gfx11.0.2,
so temp disable AGP aperture until SDMA FW resolved this.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
272308add5
commit
1a65327a84
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@ -154,11 +154,10 @@ static void gfxhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
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{
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uint64_t value;
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/* Program the AGP BAR */
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/* Disable AGP. */
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WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);
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WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
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WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
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WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, 0);
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WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, 0x00FFFFFF);
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/* Program the system aperture low logical page number. */
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WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,
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@ -611,7 +611,6 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev,
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amdgpu_gmc_vram_location(adev, &adev->gmc, base);
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amdgpu_gmc_gart_location(adev, mc);
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amdgpu_gmc_agp_location(adev, mc);
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/* base offset of vram pages */
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adev->vm_manager.vram_base_offset = adev->mmhub.funcs->get_mc_fb_offset(adev);
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@ -169,10 +169,10 @@ static void mmhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
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uint64_t value;
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uint32_t tmp;
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/* Program the AGP BAR */
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/* Disable AGP. */
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WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
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WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
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WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
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WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
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WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
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if (!amdgpu_sriov_vf(adev)) {
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/*
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@ -162,10 +162,10 @@ static void mmhub_v3_0_2_init_system_aperture_regs(struct amdgpu_device *adev)
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uint64_t value;
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uint32_t tmp;
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/* Program the AGP BAR */
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/* Disable AGP. */
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WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
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WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
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WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
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WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
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WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
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if (!amdgpu_sriov_vf(adev)) {
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/*
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