drm/amd/display: Waiting for 1 frame to fix the flash issue on PSR1
[Why] Needs more frames waiting before the PSR_Exit sending for the specific TCON. [How] Add relock_delay_frame_cnt to control how many frames waiting are needed before the PSR_Exit sending. The default value is 0. The Driver side can set this variable for specific TCONs. Reviewed-by: Robin Chen <robin.chen@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Ryan Lin <tsung-hua.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -413,6 +413,11 @@ static bool dmub_psr_copy_settings(struct dmub_psr *dmub,
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else
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copy_settings_data->debug.bitfields.force_wakeup_by_tps3 = 0;
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//WA for PSR1 on specific TCON, require frame delay for frame re-lock
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copy_settings_data->relock_delay_frame_cnt = 0;
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if (link->dpcd_caps.sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8)
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copy_settings_data->relock_delay_frame_cnt = 2;
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dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);
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dc_dmub_srv_cmd_execute(dc->dmub_srv);
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dc_dmub_srv_wait_idle(dc->dmub_srv);
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@ -1876,10 +1876,14 @@ struct dmub_cmd_psr_copy_settings_data {
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* Use FSM state for PSR power up/down
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*/
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uint8_t use_phy_fsm;
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/**
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* frame delay for frame re-lock
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*/
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uint8_t relock_delay_frame_cnt;
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/**
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* Explicit padding to 2 byte boundary.
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*/
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uint8_t pad3[2];
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uint8_t pad3;
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};
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/**
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