ARM: dts: dra7: Add ti-sysc node for VPE
Add VPE node as a child of l4 interconnect in order for it to probe using ti-sysc. Signed-off-by: Benoit Parrot <bparrot@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -4220,12 +4220,34 @@
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status = "disabled";
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status = "disabled";
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};
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};
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target-module@1d0000 { /* 0x489d0000, ap 27 30.0 */
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target-module@1d0010 { /* 0x489d0000, ap 27 30.0 */
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compatible = "ti,sysc";
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compatible = "ti,sysc-omap4", "ti,sysc";
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status = "disabled";
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reg = <0x1d0010 0x4>;
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reg-names = "sysc";
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ti,sysc-midle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>;
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ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>;
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clocks = <&vpe_clkctrl DRA7_VPE_VPE_CLKCTRL 0>;
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clock-names = "fck";
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x1d0000 0x10000>;
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ranges = <0x0 0x1d0000 0x10000>;
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vpe: vpe@0 {
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compatible = "ti,dra7-vpe";
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reg = <0x0000 0x120>,
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<0x0700 0x80>,
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<0x5700 0x18>,
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<0xd000 0x400>;
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reg-names = "vpe_top",
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"sc",
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"csc",
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"vpdma";
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interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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};
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};
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};
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};
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};
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