net: axienet: Properly handle PCS/PMA PHY for 1000BaseX mode
Update the axienet driver to properly support the Xilinx PCS/PMA PHY component which is used for 1000BaseX and SGMII modes, including properly configuring the auto-negotiation mode of the PHY and reading the negotiated state from the PHY. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Link: https://lore.kernel.org/r/20201028171429.1699922-1-robert.hancock@calian.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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1a02556086
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@ -419,6 +419,9 @@ struct axienet_local {
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struct phylink *phylink;
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struct phylink_config phylink_config;
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/* Reference to PCS/PMA PHY if used */
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struct mdio_device *pcs_phy;
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/* Clock for AXI bus */
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struct clk *clk;
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@ -1517,10 +1517,27 @@ static void axienet_validate(struct phylink_config *config,
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phylink_set(mask, Asym_Pause);
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phylink_set(mask, Pause);
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phylink_set(mask, 1000baseX_Full);
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phylink_set(mask, 10baseT_Full);
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phylink_set(mask, 100baseT_Full);
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phylink_set(mask, 1000baseT_Full);
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switch (state->interface) {
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case PHY_INTERFACE_MODE_NA:
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case PHY_INTERFACE_MODE_1000BASEX:
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_GMII:
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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case PHY_INTERFACE_MODE_RGMII_RXID:
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case PHY_INTERFACE_MODE_RGMII_TXID:
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phylink_set(mask, 1000baseX_Full);
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phylink_set(mask, 1000baseT_Full);
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if (state->interface == PHY_INTERFACE_MODE_1000BASEX)
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break;
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fallthrough;
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case PHY_INTERFACE_MODE_MII:
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phylink_set(mask, 100baseT_Full);
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phylink_set(mask, 10baseT_Full);
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default:
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break;
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}
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bitmap_and(supported, supported, mask,
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__ETHTOOL_LINK_MODE_MASK_NBITS);
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@ -1533,38 +1550,46 @@ static void axienet_mac_pcs_get_state(struct phylink_config *config,
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{
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struct net_device *ndev = to_net_dev(config->dev);
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struct axienet_local *lp = netdev_priv(ndev);
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u32 emmc_reg, fcc_reg;
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state->interface = lp->phy_mode;
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emmc_reg = axienet_ior(lp, XAE_EMMC_OFFSET);
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if (emmc_reg & XAE_EMMC_LINKSPD_1000)
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state->speed = SPEED_1000;
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else if (emmc_reg & XAE_EMMC_LINKSPD_100)
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state->speed = SPEED_100;
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else
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state->speed = SPEED_10;
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state->pause = 0;
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fcc_reg = axienet_ior(lp, XAE_FCC_OFFSET);
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if (fcc_reg & XAE_FCC_FCTX_MASK)
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state->pause |= MLO_PAUSE_TX;
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if (fcc_reg & XAE_FCC_FCRX_MASK)
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state->pause |= MLO_PAUSE_RX;
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state->an_complete = 0;
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state->duplex = 1;
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switch (state->interface) {
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_1000BASEX:
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phylink_mii_c22_pcs_get_state(lp->pcs_phy, state);
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break;
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default:
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break;
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}
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}
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static void axienet_mac_an_restart(struct phylink_config *config)
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{
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/* Unsupported, do nothing */
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struct net_device *ndev = to_net_dev(config->dev);
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struct axienet_local *lp = netdev_priv(ndev);
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phylink_mii_c22_pcs_an_restart(lp->pcs_phy);
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}
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static void axienet_mac_config(struct phylink_config *config, unsigned int mode,
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const struct phylink_link_state *state)
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{
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/* nothing meaningful to do */
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struct net_device *ndev = to_net_dev(config->dev);
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struct axienet_local *lp = netdev_priv(ndev);
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int ret;
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switch (state->interface) {
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_1000BASEX:
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ret = phylink_mii_c22_pcs_config(lp->pcs_phy, mode,
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state->interface,
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state->advertising);
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if (ret < 0)
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netdev_warn(ndev, "Failed to configure PCS: %d\n",
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ret);
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break;
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default:
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break;
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}
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}
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static void axienet_mac_link_down(struct phylink_config *config,
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@ -1999,6 +2024,20 @@ static int axienet_probe(struct platform_device *pdev)
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dev_warn(&pdev->dev,
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"error registering MDIO bus: %d\n", ret);
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}
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if (lp->phy_mode == PHY_INTERFACE_MODE_SGMII ||
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lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX) {
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if (!lp->phy_node) {
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dev_err(&pdev->dev, "phy-handle required for 1000BaseX/SGMII\n");
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ret = -EINVAL;
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goto free_netdev;
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}
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lp->pcs_phy = of_mdio_find_device(lp->phy_node);
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if (!lp->pcs_phy) {
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ret = -EPROBE_DEFER;
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goto free_netdev;
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}
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lp->phylink_config.pcs_poll = true;
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}
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lp->phylink_config.dev = &ndev->dev;
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lp->phylink_config.type = PHYLINK_NETDEV;
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@ -2036,6 +2075,9 @@ static int axienet_remove(struct platform_device *pdev)
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if (lp->phylink)
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phylink_destroy(lp->phylink);
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if (lp->pcs_phy)
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put_device(&lp->pcs_phy->dev);
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axienet_mdio_teardown(lp);
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clk_disable_unprepare(lp->clk);
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