drm/dsc: Define VESA Display Stream Compression Capabilities
This defines all the DSC parameters as per the VESA DSC spec that will be required for DSC encoder/decoder v6: (From Manasi) * Add a bit mask for RANGE_BPG_OFFSET for 6 bits(Manasi) v5 (From Manasi) * Add the RC constants as per the spec v4 (From Manasi) * Add the DSC_MUX_WORD_SIZE constants (Manasi) v3 (From Manasi) * Remove the duplicate define (Suggested By:Harry Wentland) v2: Define this struct in DRM (From Manasi) * Changed the data types to u8/u16 instead of unsigned longs (Manasi) * Remove driver specific fields (Manasi) * Move this struct definition to DRM (Manasi) * Define DSC 1.2 parameters (Manasi) * Use DSC_NUM_BUF_RANGES (Manasi) * Call it drm_dsc_config (Manasi) Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com> Co-developed-by: Gaurav K Singh <gaurav.k.singh@intel.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through drm-intel) Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-3-manasi.d.navare@intel.com
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Manasi Navare
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/* VESA Display Stream Compression DSC 1.2 constants */
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#define DSC_NUM_BUF_RANGES 15
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#define DSC_MUX_WORD_SIZE_8_10_BPC 48
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#define DSC_MUX_WORD_SIZE_12_BPC 64
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#define DSC_RC_PIXELS_PER_GROUP 3
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#define DSC_SCALE_DECREMENT_INTERVAL_MAX 4095
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#define DSC_RANGE_BPG_OFFSET_MASK 0x3f
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/* Configuration for a single Rate Control model range */
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struct drm_dsc_rc_range_parameters {
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/* Min Quantization Parameters allowed for this range */
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u8 range_min_qp;
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/* Max Quantization Parameters allowed for this range */
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u8 range_max_qp;
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/* Bits/group offset to apply to target for this group */
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u8 range_bpg_offset;
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};
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struct drm_dsc_config {
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/* Bits / component for previous reconstructed line buffer */
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u8 line_buf_depth;
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/* Bits per component to code (must be 8, 10, or 12) */
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u8 bits_per_component;
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/*
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* Flag indicating to do RGB - YCoCg conversion
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* and back (should be 1 for RGB input)
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*/
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bool convert_rgb;
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u8 slice_count;
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/* Slice Width */
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u16 slice_width;
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/* Slice Height */
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u16 slice_height;
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/*
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* 4:2:2 enable mode (from PPS, 4:2:2 conversion happens
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* outside of DSC encode/decode algorithm)
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*/
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bool enable422;
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/* Picture Width */
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u16 pic_width;
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/* Picture Height */
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u16 pic_height;
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/* Offset to bits/group used by RC to determine QP adjustment */
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u8 rc_tgt_offset_high;
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/* Offset to bits/group used by RC to determine QP adjustment */
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u8 rc_tgt_offset_low;
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/* Bits/pixel target << 4 (ie., 4 fractional bits) */
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u16 bits_per_pixel;
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/*
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* Factor to determine if an edge is present based
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* on the bits produced
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*/
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u8 rc_edge_factor;
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/* Slow down incrementing once the range reaches this value */
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u8 rc_quant_incr_limit1;
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/* Slow down incrementing once the range reaches this value */
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u8 rc_quant_incr_limit0;
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/* Number of pixels to delay the initial transmission */
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u16 initial_xmit_delay;
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/* Number of pixels to delay the VLD on the decoder,not including SSM */
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u16 initial_dec_delay;
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/* Block prediction enable */
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bool block_pred_enable;
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/* Bits/group offset to use for first line of the slice */
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u8 first_line_bpg_offset;
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/* Value to use for RC model offset at slice start */
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u16 initial_offset;
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/* Thresholds defining each of the buffer ranges */
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u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
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/* Parameters for each of the RC ranges */
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struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES];
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/* Total size of RC model */
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u16 rc_model_size;
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/* Minimum QP where flatness information is sent */
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u8 flatness_min_qp;
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/* Maximum QP where flatness information is sent */
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u8 flatness_max_qp;
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/* Initial value for scale factor */
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u8 initial_scale_value;
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/* Decrement scale factor every scale_decrement_interval groups */
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u16 scale_decrement_interval;
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/* Increment scale factor every scale_increment_interval groups */
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u16 scale_increment_interval;
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/* Non-first line BPG offset to use */
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u16 nfl_bpg_offset;
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/* BPG offset used to enforce slice bit */
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u16 slice_bpg_offset;
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/* Final RC linear transformation offset value */
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u16 final_offset;
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/* Enable on-off VBR (ie., disable stuffing bits) */
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bool vbr_enable;
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/* Mux word size (in bits) for SSM mode */
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u8 mux_word_size;
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/*
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* The (max) size in bytes of the "chunks" that are
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* used in slice multiplexing
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*/
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u16 slice_chunk_size;
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/* Rate Control buffer siz in bits */
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u16 rc_bits;
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/* DSC Minor Version */
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u8 dsc_version_minor;
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/* DSC Major version */
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u8 dsc_version_major;
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/* Native 4:2:2 support */
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bool native_422;
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/* Native 4:2:0 support */
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bool native_420;
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/* Additional bits/grp for seconnd line of slice for native 4:2:0 */
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u8 second_line_bpg_offset;
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/* Num of bits deallocated for each grp that is not in second line of slice */
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u16 nsl_bpg_offset;
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/* Offset adj fr second line in Native 4:2:0 mode */
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u16 second_line_offset_adj;
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};
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/**
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* struct picture_parameter_set - Represents 128 bytes of Picture Parameter Set
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