arm64: dts: mt8183: add mt8183 pumpkin board
The MT8183 Pumpkin board is manufactured by OLogic and includes a MediaTek MT8183 SoC with 2GB of RAM. The board provides the following IOs: * 2 USB Type-A ports * Ethernet * Serial UART over micro-USB port * 1 USB Type-C dual role port * 1 USB Type-C power only port * 1 Jack for audio * RPI compatible header * MT7668 wiresless chip with Wi-Fi AC and BT 5 * Micro-HDMI port * 2 connectors for CSI cameras * 1 connector for DSI display * 1 JTAG port Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20210217205945.830006-2-fparent@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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@ -22,5 +22,6 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku288.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku32.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-pumpkin.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb
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@ -0,0 +1,378 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2021 BayLibre, SAS.
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* Author: Fabien Parent <fparent@baylibre.com>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include "mt8183.dtsi"
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#include "mt6358.dtsi"
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/ {
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model = "Pumpkin MT8183";
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compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183";
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aliases {
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serial0 = &uart0;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x80000000>;
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};
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chosen {
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stdout-path = "serial0:921600n8";
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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scp_mem_reserved: scp_mem_region {
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compatible = "shared-dma-pool";
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reg = <0 0x50000000 0 0x2900000>;
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no-map;
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};
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};
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leds {
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compatible = "gpio-leds";
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led-red {
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label = "red";
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gpios = <&pio 155 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-green {
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label = "green";
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gpios = <&pio 156 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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ntc@0 {
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compatible = "murata,ncp03wf104";
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pullup-uv = <1800000>;
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pullup-ohm = <390000>;
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pulldown-ohm = <0>;
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io-channels = <&auxadc 0>;
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};
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};
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&auxadc {
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins_0>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins_1>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins_2>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins_3>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins_4>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&i2c5 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins_5>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&i2c6 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c6_pins>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&mmc0 {
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status = "okay";
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_pins_default>;
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pinctrl-1 = <&mmc0_pins_uhs>;
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bus-width = <8>;
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max-frequency = <200000000>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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cap-mmc-hw-reset;
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no-sdio;
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no-sd;
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hs400-ds-delay = <0x12814>;
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vmmc-supply = <&mt6358_vemc_reg>;
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vqmmc-supply = <&mt6358_vio18_reg>;
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assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
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assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
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non-removable;
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};
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&mmc1 {
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status = "okay";
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc1_pins_default>;
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pinctrl-1 = <&mmc1_pins_uhs>;
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bus-width = <4>;
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max-frequency = <200000000>;
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cap-sd-highspeed;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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cap-sdio-irq;
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no-mmc;
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no-sd;
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vmmc-supply = <&mt6358_vmch_reg>;
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vqmmc-supply = <&mt6358_vmc_reg>;
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keep-power-in-suspend;
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enable-sdio-wakeup;
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non-removable;
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};
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&pio {
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i2c_pins_0: i2c0 {
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pins_i2c{
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pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
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<PINMUX_GPIO83__FUNC_SCL0>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c_pins_1: i2c1 {
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pins_i2c{
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pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
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<PINMUX_GPIO84__FUNC_SCL1>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c_pins_2: i2c2 {
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pins_i2c{
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pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
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<PINMUX_GPIO104__FUNC_SDA2>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c_pins_3: i2c3 {
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pins_i2c{
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pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
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<PINMUX_GPIO51__FUNC_SDA3>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c_pins_4: i2c4 {
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pins_i2c{
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pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
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<PINMUX_GPIO106__FUNC_SDA4>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c_pins_5: i2c5 {
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pins_i2c{
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pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
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<PINMUX_GPIO49__FUNC_SDA5>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c6_pins: i2c6 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO113__FUNC_SCL6>,
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<PINMUX_GPIO114__FUNC_SDA6>;
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mediatek,pull-up-adv = <3>;
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};
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};
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mmc0_pins_default: mmc0-pins-default {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
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<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
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<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
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<PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
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<PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
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<PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
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<PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
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<PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
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<PINMUX_GPIO122__FUNC_MSDC0_CMD>;
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input-enable;
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drive-strength = <MTK_DRIVE_14mA>;
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mediatek,pull-up-adv = <01>;
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};
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pins_clk {
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pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
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drive-strength = <MTK_DRIVE_14mA>;
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mediatek,pull-down-adv = <10>;
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};
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pins_rst {
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pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
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drive-strength = <MTK_DRIVE_14mA>;
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mediatek,pull-down-adv = <01>;
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};
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};
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mmc0_pins_uhs: mmc0-pins-uhs {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
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<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
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<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
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<PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
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<PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
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<PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
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<PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
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<PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
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<PINMUX_GPIO122__FUNC_MSDC0_CMD>;
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input-enable;
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drive-strength = <MTK_DRIVE_14mA>;
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mediatek,pull-up-adv = <01>;
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};
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pins_clk {
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pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
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drive-strength = <MTK_DRIVE_14mA>;
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mediatek,pull-down-adv = <10>;
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};
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pins_ds {
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pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
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drive-strength = <MTK_DRIVE_14mA>;
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mediatek,pull-down-adv = <10>;
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};
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pins_rst {
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pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
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drive-strength = <MTK_DRIVE_14mA>;
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mediatek,pull-up-adv = <01>;
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};
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};
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mmc1_pins_default: mmc1-pins-default {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
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<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
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<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
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<PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
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<PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
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input-enable;
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mediatek,pull-up-adv = <10>;
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};
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pins_clk {
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pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
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input-enable;
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mediatek,pull-down-adv = <10>;
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};
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pins_pmu {
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pinmux = <PINMUX_GPIO178__FUNC_GPIO178>;
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output-high;
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};
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};
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mmc1_pins_uhs: mmc1-pins-uhs {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
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<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
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<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
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<PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
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<PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
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drive-strength = <MTK_DRIVE_6mA>;
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input-enable;
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mediatek,pull-up-adv = <10>;
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};
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pins_clk {
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pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
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drive-strength = <MTK_DRIVE_8mA>;
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mediatek,pull-down-adv = <10>;
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input-enable;
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};
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};
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};
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&mfg {
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domain-supply = <&mt6358_vgpu_reg>;
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};
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&cpu0 {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu1 {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu2 {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu3 {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu4 {
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proc-supply = <&mt6358_vproc11_reg>;
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};
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&cpu5 {
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proc-supply = <&mt6358_vproc11_reg>;
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};
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&cpu6 {
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proc-supply = <&mt6358_vproc11_reg>;
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};
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&cpu7 {
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proc-supply = <&mt6358_vproc11_reg>;
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};
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&uart0 {
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status = "okay";
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};
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&scp {
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status = "okay";
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};
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&dsi0 {
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status = "disabled";
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};
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