ARM: OMAP2+: clock: add support for specific CM ops to ti_clk_ll_ops
Clock driver requires access to some CM API functions once the code is being moved under the clock driver from the platform directory. Gate type clock requires access to cm_wait_module_ready and cm_split_idlest_reg functions, which are both used for waiting until the module being clocked has been successfully activated. These CM APIs are now exported through the ti_clk_ll_ops struct. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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@ -122,6 +122,8 @@ static struct ti_clk_ll_ops omap_clk_ll_ops = {
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.clk_writel = clk_memmap_writel,
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.clkdm_clk_enable = clkdm_clk_enable,
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.clkdm_clk_disable = clkdm_clk_disable,
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.cm_wait_module_ready = omap_cm_wait_module_ready,
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.cm_split_idlest_reg = cm_split_idlest_reg,
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};
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/**
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@ -243,6 +243,8 @@ struct clk_omap_reg {
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* @clk_writel: pointer to register write function
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* @clkdm_clk_enable: pointer to clockdomain enable function
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* @clkdm_clk_disable: pointer to clockdomain disable function
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* @cm_wait_module_ready: pointer to CM module wait ready function
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* @cm_split_idlest_reg: pointer to CM module function to split idlest reg
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*
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* Low-level ops are generally used by the basic clock types (clk-gate,
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* clk-mux, clk-divider etc.) to provide support for various low-level
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@ -256,6 +258,10 @@ struct ti_clk_ll_ops {
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int (*clkdm_clk_enable)(struct clockdomain *clkdm, struct clk *clk);
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int (*clkdm_clk_disable)(struct clockdomain *clkdm,
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struct clk *clk);
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int (*cm_wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
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u8 idlest_shift);
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int (*cm_split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
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u8 *idlest_reg_id);
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};
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extern struct ti_clk_ll_ops *ti_clk_ll_ops;
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