RDMA/mlx5: Remove implicit ODP cache entry
Implicit ODP mkey doesn't have unique properties. It shares the same properties as the order 18 cache entry. There is no need to devote a special entry for that. Link: https://lore.kernel.org/r/20230125222807.6921-3-michaelgur@nvidia.com Signed-off-by: Aharon Landau <aharonl@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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@ -405,6 +405,7 @@ static void mlx5_ib_page_fault_resume(struct mlx5_ib_dev *dev,
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static struct mlx5_ib_mr *implicit_get_child_mr(struct mlx5_ib_mr *imr,
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unsigned long idx)
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{
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int order = order_base_2(MLX5_IMR_MTT_ENTRIES);
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struct mlx5_ib_dev *dev = mr_to_mdev(imr);
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struct ib_umem_odp *odp;
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struct mlx5_ib_mr *mr;
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@ -417,7 +418,8 @@ static struct mlx5_ib_mr *implicit_get_child_mr(struct mlx5_ib_mr *imr,
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if (IS_ERR(odp))
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return ERR_CAST(odp);
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mr = mlx5_mr_cache_alloc(dev, &dev->cache.ent[MLX5_IMR_MTT_CACHE_ENTRY],
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BUILD_BUG_ON(order > MKEY_CACHE_LAST_STD_ENTRY);
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mr = mlx5_mr_cache_alloc(dev, &dev->cache.ent[order],
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imr->access_flags);
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if (IS_ERR(mr)) {
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ib_umem_odp_release(odp);
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@ -1591,20 +1593,8 @@ void mlx5_odp_init_mkey_cache_entry(struct mlx5_cache_ent *ent)
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{
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if (!(ent->dev->odp_caps.general_caps & IB_ODP_SUPPORT_IMPLICIT))
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return;
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switch (ent->order - 2) {
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case MLX5_IMR_MTT_CACHE_ENTRY:
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ent->ndescs = MLX5_IMR_MTT_ENTRIES;
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ent->access_mode = MLX5_MKC_ACCESS_MODE_MTT;
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ent->limit = 0;
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break;
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case MLX5_IMR_KSM_CACHE_ENTRY:
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ent->ndescs = mlx5_imr_ksm_entries;
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ent->access_mode = MLX5_MKC_ACCESS_MODE_KSM;
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ent->limit = 0;
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break;
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}
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ent->ndescs = mlx5_imr_ksm_entries;
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ent->access_mode = MLX5_MKC_ACCESS_MODE_KSM;
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}
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static const struct ib_device_ops mlx5_ib_dev_odp_ops = {
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@ -734,7 +734,6 @@ enum {
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enum {
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MKEY_CACHE_LAST_STD_ENTRY = 20,
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MLX5_IMR_MTT_CACHE_ENTRY,
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MLX5_IMR_KSM_CACHE_ENTRY,
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MAX_MKEY_CACHE_ENTRIES
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};
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