drm/amd/display: guard DPPHY_Internal_ctrl
[why] this register not exist in some asic, based on request remove this from dc. [how] add guard for sanization. Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
c38cc6770f
commit
18952c8e5f
|
@ -62,11 +62,11 @@
|
|||
SRI(DP_DPHY_FAST_TRAINING, DP, id), \
|
||||
SRI(DP_SEC_CNTL1, DP, id), \
|
||||
SRI(DP_DPHY_BS_SR_SWAP_CNTL, DP, id), \
|
||||
SRI(DP_DPHY_INTERNAL_CTRL, DP, id), \
|
||||
SRI(DP_DPHY_HBR2_PATTERN_CONTROL, DP, id)
|
||||
|
||||
|
||||
#define LE_DCN10_REG_LIST(id)\
|
||||
SRI(DP_DPHY_INTERNAL_CTRL, DP, id), \
|
||||
LE_DCN_COMMON_REG_LIST(id)
|
||||
|
||||
struct dcn10_link_enc_aux_registers {
|
||||
|
|
Loading…
Reference in New Issue