i2c: rcar: refactor TCYC handling
The latest documentation made it clear that we need to initialize the TCYC value independently of DMA. The old code used TCYC06 (wrongly) for non-DMA transfers. The new code sets TCYC up independently from DMA. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -39,8 +39,8 @@
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#define ICSAR 0x1C /* slave address */
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#define ICMAR 0x20 /* master address */
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#define ICRXTX 0x24 /* data port */
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#define ICDMAER 0x3c /* DMA enable */
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#define ICFBSCR 0x38 /* first bit setup cycle */
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#define ICFBSCR 0x38 /* first bit setup cycle (Gen3) */
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#define ICDMAER 0x3c /* DMA enable (Gen3) */
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/* ICSCR */
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#define SDBS (1 << 3) /* slave data buffer select */
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@ -83,7 +83,6 @@
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#define TMDMAE (1 << 0) /* DMA Master Transmitted Enable */
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/* ICFBSCR */
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#define TCYC06 0x04 /* 6*Tcyc delay 1st bit between SDA and SCL */
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#define TCYC17 0x0f /* 17*Tcyc delay 1st bit between SDA and SCL */
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@ -212,6 +211,10 @@ static void rcar_i2c_init(struct rcar_i2c_priv *priv)
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rcar_i2c_write(priv, ICMSR, 0);
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/* start clock */
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rcar_i2c_write(priv, ICCCR, priv->icccr);
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if (priv->devtype == I2C_RCAR_GEN3)
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rcar_i2c_write(priv, ICFBSCR, TCYC17);
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}
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static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv)
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@ -363,9 +366,6 @@ static void rcar_i2c_dma_unmap(struct rcar_i2c_priv *priv)
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/* Disable DMA Master Received/Transmitted */
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rcar_i2c_write(priv, ICDMAER, 0);
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/* Reset default delay */
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rcar_i2c_write(priv, ICFBSCR, TCYC06);
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dma_unmap_single(chan->device->dev, sg_dma_address(&priv->sg),
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sg_dma_len(&priv->sg), priv->dma_direction);
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@ -461,9 +461,6 @@ static void rcar_i2c_dma(struct rcar_i2c_priv *priv)
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return;
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}
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/* Set delay for DMA operations */
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rcar_i2c_write(priv, ICFBSCR, TCYC17);
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/* Enable DMA Master Received/Transmitted */
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if (read)
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rcar_i2c_write(priv, ICDMAER, RMDMAE);
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