arm64: dts: qcom: msm8992: Add USB support
This is a very basic dwc3 configuration (no PHYs yet), but it works. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20201005150313.149754-11-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -242,6 +242,37 @@
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};
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};
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};
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};
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usb3: usb@f92f8800 {
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compatible = "qcom,msm8996-dwc3", "qcom,dwc3";
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reg = <0xf92f8800 0x400>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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clocks = <&gcc GCC_USB30_MASTER_CLK>,
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<&gcc GCC_SYS_NOC_USB3_AXI_CLK>,
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<&gcc GCC_USB30_SLEEP_CLK>,
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<&gcc GCC_USB30_MOCK_UTMI_CLK>;
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clock-names = "core", "iface", "sleep", "mock_utmi", "ref", "xo";
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assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
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<&gcc GCC_USB30_MASTER_CLK>;
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assigned-clock-rates = <19200000>, <120000000>;
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power-domains = <&gcc USB30_GDSC>;
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qcom,select-utmi-as-pipe-clk;
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dwc3@f9200000 {
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compatible = "snps,dwc3";
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reg = <0xf9200000 0xcc00>;
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interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
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snps,dis_u2_susphy_quirk;
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snps,dis_enblslpm_quirk;
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maximum-speed = "high-speed";
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dr_mode = "peripheral";
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};
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};
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sdhc_1: sdhci@f9824900 {
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sdhc_1: sdhci@f9824900 {
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compatible = "qcom,sdhci-msm-v4";
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compatible = "qcom,sdhci-msm-v4";
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reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
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reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
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