ARM: dts: imx6ull-colibri: add/update some comments
Add/update some comments. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Marcel Ziswiler
Shawn Guo
parent
5484536885
commit
17c101d839
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@ -8,7 +8,7 @@
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/ {
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aliases {
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mmc0 = &usdhc2; /* eMMC */
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mmc1 = &usdhc1; /* MMC 4bit slot */
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mmc1 = &usdhc1; /* MMC 4-bit slot */
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};
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memory@80000000 {
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@ -154,6 +154,7 @@
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"SODIMM_127";
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};
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/* NAND */
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&gpmi {
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status = "disabled";
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};
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@ -170,6 +171,7 @@
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pinctrl-0 = <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio3>;
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};
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/* eMMC */
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2emmc>;
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@ -6,6 +6,7 @@
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#include "imx6ull.dtsi"
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/ {
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/* Ethernet aliases to ensure correct MAC addresses */
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aliases {
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ethernet0 = &fec2;
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ethernet1 = &fec1;
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@ -104,6 +105,7 @@
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pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
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};
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/* Ethernet */
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&fec2 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&pinctrl_enet2>;
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@ -125,6 +127,7 @@
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};
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};
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/* NAND */
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&gpmi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpmi_nand>;
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@ -136,6 +139,7 @@
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status = "okay";
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};
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/* I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) */
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&i2c1 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1>;
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@ -157,6 +161,10 @@
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};
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};
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/*
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* PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
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* touch screen controller
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*/
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&i2c2 {
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/* Use low frequency to compensate for the high pull-up values. */
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clock-frequency = <40000>;
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@ -196,21 +204,25 @@
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};
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};
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/* PWM <A> */
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&pwm4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm4>;
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};
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/* PWM <B> */
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&pwm5 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm5>;
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};
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/* PWM <C> */
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&pwm6 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm6>;
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};
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/* PWM <D> */
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&pwm7 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm7>;
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@ -224,6 +236,7 @@
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status = "disabled";
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};
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/* Colibri UART_A */
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
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@ -231,6 +244,7 @@
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fsl,dte-mode;
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};
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/* Colibri UART_B */
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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@ -238,12 +252,14 @@
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fsl,dte-mode;
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};
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/* Colibri UART_C */
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&uart5 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart5>;
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fsl,dte-mode;
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};
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/* Colibri USBC */
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&usbotg1 {
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dr_mode = "otg";
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srp-disable;
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@ -251,10 +267,12 @@
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adp-disable;
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};
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/* Colibri USBH */
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&usbotg2 {
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dr_mode = "host";
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};
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/* Colibri MMC/SD */
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
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pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>;
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@ -265,7 +283,7 @@
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assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
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assigned-clock-rates = <0>, <198000000>;
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bus-width = <4>;
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cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
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cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; /* MMC_CD */
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disable-wp;
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keep-power-in-suspend;
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no-1-8-v;
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@ -431,7 +449,7 @@
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/*
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* With an eMMC instead of a raw NAND device the following pins
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* are available at SODIMM pins
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* are available at SODIMM pins.
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*/
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pinctrl_gpmi_gpio: gpmi-gpio-grp {
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fsl,pins = <
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@ -556,10 +574,10 @@
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pinctrl_uart1_ctrl1: uart1-ctrl1-grp { /* Additional DTR, DCD */
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fsl,pins = <
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MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x70a0 /* SODIMM 31 */
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MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x10b0 /* SODIMM 29 */
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MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x90b1 /* SODIMM 23 */
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MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x10b0 /* SODIMM 37 */
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MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x70a0 /* SODIMM 31 / DCD */
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MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x10b0 /* SODIMM 29 / DSR */
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MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x90b1 /* SODIMM 23 / DTR */
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MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x10b0 /* SODIMM 37 / RI */
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>;
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};
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@ -580,7 +598,7 @@
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pinctrl_usbh_reg: gpio-usbh-reg {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 /* SODIMM 129 */
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MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 /* SODIMM 129 / USBH_PEN */
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>;
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};
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@ -658,7 +676,7 @@
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MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x110a0 /* SODIMM 93 */
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MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x110a0 /* SODIMM 95 */
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MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x1b0a0 /* SODIMM 105 */
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MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0a0 /* SODIMM 131 */
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MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0a0 /* SODIMM 131 / USBH_OC */
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MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x110a0 /* SODIMM 138 */
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>;
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};
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@ -695,7 +713,7 @@
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pinctrl_snvs_usdhc1_cd: snvs-usdhc1-cd-grp {
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fsl,pins = <
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MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0a0 /* SODIMM 43 */
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MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0a0 /* SODIMM 43 / MMC_CD */
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>;
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};
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