irqchip fixes for Linux 5.10, take #1
- A couple of fixes after the IPI as IRQ patches (Kconfig, bcm2836) - Two SiFive PLIC fixes (irq_set_affinity, hierarchy handling) - "unmapped events" handling for the ti-sci-inta controller - Tidying up for the irq-mst driver (static functions, Kconfig) - Small cleanup in the Renesas irqpin driver - STM32 exti can now handle LP timer events -----BEGIN PGP SIGNATURE----- iQJDBAABCgAtFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAl+epWwPHG1hekBrZXJu ZWwub3JnAAoJECPQ0LrRPXpDpEUQAKiWUeetZGxhuvhEumrzGtoiWYNGt8ohakfr 971ap2pb9uVRZ/Kg8m5zXt17Q0Q3DpZCYuSiugq++xiv311GIGSPbpbzFTxhyXE7 f5rALVnpyEfEU+s750TjWO2pjqvUEPbpkJwZCpvF1PG7LeeCMRlzfbVrPmZANnrQ T98zuhUuMzuwERE/zeYL1k+J2gnV8EpGXiygRbrlkwnH6wAXuiNsoGSBAgByBYTN 1dX9F+6XppnLsc2N61YowqjYJzjbzXDZ+2OBADKEfWJTY1yswWALSfHmg1qdToMt LU6OMZLGiNp5REzra0HRtwpfVE82J+QkOxtsh+4q3gAJY20dp/G4jBdXthlkelPF Dxdmqe8SkrAWZYh98NjLR00kUoGS7iHHVxioEtJnPU9UIOJjshUfFwTEzczgasm7 yCFh+wv1nW5VBegAOlIN3pCTQSFD5fB0WBhqgtEEKZ/HzCOzAy+PrpOPSuKUtcD6 xGXfRMsoSPUWmUD6st4/I5Cf+XKLz8jnGGNbxAwtu1PZjIlJYiXaduDlTaaKS0nc kF7+t4W5aVnWld9EaEeV/wspwT3MhJjPGScTrgvegW+9q6ff3sKp4LtWP79TtF1B x6jEtho6xyo5yi+tAPgmIgsln5//iTTQpl0WyuAm8ZJ61+Z5VFoolIb3Vwk5Rg50 +83M7DfM =gDko -----END PGP SIGNATURE----- Merge tag 'irqchip-fixes-5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent Pull irqchip fixes from Marc Zyngier: - A couple of fixes after the IPI as IRQ patches (Kconfig, bcm2836) - Two SiFive PLIC fixes (irq_set_affinity, hierarchy handling) - "unmapped events" handling for the ti-sci-inta controller - Tidying up for the irq-mst driver (static functions, Kconfig) - Small cleanup in the Renesas irqpin driver - STM32 exti can now handle LP timer events
This commit is contained in:
Thomas Gleixner
commit
17bb415fef
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@ -111,6 +111,7 @@ ForEachMacros:
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- 'css_for_each_descendant_pre'
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- 'device_for_each_child_node'
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- 'dma_fence_chain_for_each'
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- 'do_for_each_ftrace_op'
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- 'drm_atomic_crtc_for_each_plane'
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- 'drm_atomic_crtc_state_for_each_plane'
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- 'drm_atomic_crtc_state_for_each_plane_state'
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@ -136,6 +137,7 @@ ForEachMacros:
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- 'for_each_active_dev_scope'
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- 'for_each_active_drhd_unit'
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- 'for_each_active_iommu'
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- 'for_each_aggr_pgid'
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- 'for_each_available_child_of_node'
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- 'for_each_bio'
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- 'for_each_board_func_rsrc'
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@ -234,6 +236,7 @@ ForEachMacros:
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- 'for_each_node_state'
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- 'for_each_node_with_cpus'
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- 'for_each_node_with_property'
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- 'for_each_nonreserved_multicast_dest_pgid'
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- 'for_each_of_allnodes'
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- 'for_each_of_allnodes_from'
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- 'for_each_of_cpu_node'
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@ -256,6 +259,7 @@ ForEachMacros:
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- 'for_each_pci_dev'
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- 'for_each_pci_msi_entry'
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- 'for_each_pcm_streams'
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- 'for_each_physmem_range'
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- 'for_each_populated_zone'
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- 'for_each_possible_cpu'
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- 'for_each_present_cpu'
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@ -265,6 +269,8 @@ ForEachMacros:
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- 'for_each_process_thread'
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- 'for_each_property_of_node'
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- 'for_each_registered_fb'
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- 'for_each_requested_gpio'
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- 'for_each_requested_gpio_in_range'
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- 'for_each_reserved_mem_region'
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- 'for_each_rtd_codec_dais'
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- 'for_each_rtd_codec_dais_rollback'
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@ -278,12 +284,17 @@ ForEachMacros:
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- 'for_each_sg'
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- 'for_each_sg_dma_page'
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- 'for_each_sg_page'
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- 'for_each_sgtable_dma_page'
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- 'for_each_sgtable_dma_sg'
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- 'for_each_sgtable_page'
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- 'for_each_sgtable_sg'
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- 'for_each_sibling_event'
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- 'for_each_subelement'
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- 'for_each_subelement_extid'
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- 'for_each_subelement_id'
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- '__for_each_thread'
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- 'for_each_thread'
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- 'for_each_unicast_dest_pgid'
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- 'for_each_wakeup_source'
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- 'for_each_zone'
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- 'for_each_zone_zonelist'
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@ -464,6 +475,7 @@ ForEachMacros:
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- 'v4l2_m2m_for_each_src_buf'
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- 'v4l2_m2m_for_each_src_buf_safe'
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- 'virtio_device_for_each_vq'
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- 'while_for_each_ftrace_op'
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- 'xa_for_each'
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- 'xa_for_each_marked'
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- 'xa_for_each_range'
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122
.mailmap
122
.mailmap
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@ -15,30 +15,31 @@
|
|||
Aaron Durbin <adurbin@google.com>
|
||||
Adam Oldham <oldhamca@gmail.com>
|
||||
Adam Radford <aradford@gmail.com>
|
||||
Adrian Bunk <bunk@stusta.de>
|
||||
Adriana Reus <adi.reus@gmail.com> <adriana.reus@intel.com>
|
||||
Adrian Bunk <bunk@stusta.de>
|
||||
Alan Cox <alan@lxorguk.ukuu.org.uk>
|
||||
Alan Cox <root@hraefn.swansea.linux.org.uk>
|
||||
Aleksey Gorelov <aleksey_gorelov@phoenix.com>
|
||||
Aleksandar Markovic <aleksandar.markovic@mips.com> <aleksandar.markovic@imgtec.com>
|
||||
Alex Shi <alex.shi@linux.alibaba.com> <alex.shi@intel.com>
|
||||
Alex Shi <alex.shi@linux.alibaba.com> <alex.shi@linaro.org>
|
||||
Aleksey Gorelov <aleksey_gorelov@phoenix.com>
|
||||
Alexander Lobakin <alobakin@pm.me> <alobakin@dlink.ru>
|
||||
Alexander Lobakin <alobakin@pm.me> <alobakin@marvell.com>
|
||||
Alexander Lobakin <alobakin@pm.me> <bloodyreaper@yandex.ru>
|
||||
Alexandre Belloni <alexandre.belloni@bootlin.com> <alexandre.belloni@free-electrons.com>
|
||||
Alexei Starovoitov <ast@kernel.org> <ast@plumgrid.com>
|
||||
Alexei Starovoitov <ast@kernel.org> <alexei.starovoitov@gmail.com>
|
||||
Alexei Starovoitov <ast@kernel.org> <ast@fb.com>
|
||||
Alexei Starovoitov <ast@kernel.org> <ast@plumgrid.com>
|
||||
Alex Shi <alex.shi@linux.alibaba.com> <alex.shi@intel.com>
|
||||
Alex Shi <alex.shi@linux.alibaba.com> <alex.shi@linaro.org>
|
||||
Al Viro <viro@ftp.linux.org.uk>
|
||||
Al Viro <viro@zenIV.linux.org.uk>
|
||||
Andi Kleen <ak@linux.intel.com> <ak@suse.de>
|
||||
Andi Shyti <andi@etezian.org> <andi.shyti@samsung.com>
|
||||
Andreas Herrmann <aherrman@de.ibm.com>
|
||||
Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com>
|
||||
Andrew Morton <akpm@linux-foundation.org>
|
||||
Andrew Murray <amurray@thegoodpenguin.co.uk> <andrew.murray@arm.com>
|
||||
Andrew Murray <amurray@thegoodpenguin.co.uk> <amurray@embedded-bits.co.uk>
|
||||
Andrew Murray <amurray@thegoodpenguin.co.uk> <andrew.murray@arm.com>
|
||||
Andrew Vasquez <andrew.vasquez@qlogic.com>
|
||||
Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com>
|
||||
Andy Adamson <andros@citi.umich.edu>
|
||||
Antoine Tenart <antoine.tenart@free-electrons.com>
|
||||
Antonio Ospite <ao2@ao2.it> <ao2@amarulasolutions.com>
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||||
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@ -48,40 +49,42 @@ Arnaud Patard <arnaud.patard@rtp-net.org>
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Arnd Bergmann <arnd@arndb.de>
|
||||
Axel Dyks <xl@xlsigned.net>
|
||||
Axel Lin <axel.lin@gmail.com>
|
||||
Bart Van Assche <bvanassche@acm.org> <bart.vanassche@wdc.com>
|
||||
Bart Van Assche <bvanassche@acm.org> <bart.vanassche@sandisk.com>
|
||||
Bart Van Assche <bvanassche@acm.org> <bart.vanassche@wdc.com>
|
||||
Ben Gardner <bgardner@wabtec.com>
|
||||
Ben M Cahill <ben.m.cahill@intel.com>
|
||||
Björn Steinbrink <B.Steinbrink@gmx.de>
|
||||
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>
|
||||
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>
|
||||
Boris Brezillon <bbrezillon@kernel.org> <b.brezillon.dev@gmail.com>
|
||||
Boris Brezillon <bbrezillon@kernel.org> <b.brezillon@overkiz.com>
|
||||
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>
|
||||
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>
|
||||
Brian Avery <b.avery@hp.com>
|
||||
Brian King <brking@us.ibm.com>
|
||||
Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>
|
||||
Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>
|
||||
Chao Yu <chao@kernel.org> <chao2.yu@samsung.com>
|
||||
Chao Yu <chao@kernel.org> <yuchao0@huawei.com>
|
||||
Christoph Hellwig <hch@lst.de>
|
||||
Christophe Ricard <christophe.ricard@gmail.com>
|
||||
Christoph Hellwig <hch@lst.de>
|
||||
Corey Minyard <minyard@acm.org>
|
||||
Damian Hobson-Garcia <dhobsong@igel.co.jp>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <dborkman@redhat.com>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <dborkmann@redhat.com>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <danborkmann@googlemail.com>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <danborkmann@iogearbox.net>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <daniel.borkmann@tik.ee.ethz.ch>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <danborkmann@googlemail.com>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <dborkmann@redhat.com>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <dborkman@redhat.com>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <dxchgb@gmail.com>
|
||||
David Brownell <david-b@pacbell.net>
|
||||
David Woodhouse <dwmw2@shinybook.infradead.org>
|
||||
Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@mips.com>
|
||||
Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@imgtec.com>
|
||||
Dengcheng Zhu <dzhu@wavecomp.com> <dczhu@mips.com>
|
||||
Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@gmail.com>
|
||||
Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@imgtec.com>
|
||||
Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@mips.com>
|
||||
<dev.kurt@vandijck-laurijssen.be> <kurt.van.dijck@eia.be>
|
||||
Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
|
||||
Dmitry Safonov <0x7f454c46@gmail.com> <dsafonov@virtuozzo.com>
|
||||
Dmitry Safonov <0x7f454c46@gmail.com> <d.safonov@partner.samsung.com>
|
||||
Dmitry Safonov <0x7f454c46@gmail.com> <dima@arista.com>
|
||||
Dmitry Safonov <0x7f454c46@gmail.com> <d.safonov@partner.samsung.com>
|
||||
Dmitry Safonov <0x7f454c46@gmail.com> <dsafonov@virtuozzo.com>
|
||||
Domen Puncer <domen@coderock.org>
|
||||
Douglas Gilbert <dougg@torque.net>
|
||||
Ed L. Cashin <ecashin@coraid.com>
|
||||
|
|
@ -92,20 +95,22 @@ Felix Kuhling <fxkuehl@gmx.de>
|
|||
Felix Moeller <felix@derklecks.de>
|
||||
Filipe Lautert <filipe@icewall.org>
|
||||
Franck Bui-Huu <vagabon.xyz@gmail.com>
|
||||
Frank Rowand <frowand.list@gmail.com> <frowand@mvista.com>
|
||||
Frank Rowand <frowand.list@gmail.com> <frank.rowand@am.sony.com>
|
||||
Frank Rowand <frowand.list@gmail.com> <frank.rowand@sonymobile.com>
|
||||
Frank Rowand <frowand.list@gmail.com> <frowand@mvista.com>
|
||||
Frank Zago <fzago@systemfabricworks.com>
|
||||
Gao Xiang <xiang@kernel.org> <gaoxiang25@huawei.com>
|
||||
Gao Xiang <xiang@kernel.org> <hsiangkao@aol.com>
|
||||
Gerald Schaefer <gerald.schaefer@linux.ibm.com> <gerald.schaefer@de.ibm.com>
|
||||
Gerald Schaefer <gerald.schaefer@linux.ibm.com> <geraldsc@de.ibm.com>
|
||||
Gerald Schaefer <gerald.schaefer@linux.ibm.com> <gerald.schaefer@de.ibm.com>
|
||||
Gerald Schaefer <gerald.schaefer@linux.ibm.com> <geraldsc@linux.vnet.ibm.com>
|
||||
Greg Kroah-Hartman <greg@echidna.(none)>
|
||||
Greg Kroah-Hartman <gregkh@suse.de>
|
||||
Greg Kroah-Hartman <greg@kroah.com>
|
||||
Greg Kurz <groug@kaod.org> <gkurz@linux.vnet.ibm.com>
|
||||
Gregory CLEMENT <gregory.clement@bootlin.com> <gregory.clement@free-electrons.com>
|
||||
Gustavo Padovan <gustavo@las.ic.unicamp.br>
|
||||
Gustavo Padovan <padovan@profusion.mobi>
|
||||
Hanjun Guo <guohanjun@huawei.com> <hanjun.guo@linaro.org>
|
||||
Heiko Carstens <hca@linux.ibm.com> <h.carstens@de.ibm.com>
|
||||
Heiko Carstens <hca@linux.ibm.com> <heiko.carstens@de.ibm.com>
|
||||
|
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@ -115,32 +120,33 @@ Henrik Rydberg <rydberg@bitmath.org>
|
|||
Herbert Xu <herbert@gondor.apana.org.au>
|
||||
Jacob Shin <Jacob.Shin@amd.com>
|
||||
Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk@google.com>
|
||||
Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk@motorola.com>
|
||||
Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk.kim@samsung.com>
|
||||
Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk@motorola.com>
|
||||
Jakub Kicinski <kuba@kernel.org> <jakub.kicinski@netronome.com>
|
||||
James Bottomley <jejb@mulgrave.(none)>
|
||||
James Bottomley <jejb@titanic.il.steeleye.com>
|
||||
James E Wilson <wilson@specifix.com>
|
||||
James Hogan <jhogan@kernel.org> <james.hogan@imgtec.com>
|
||||
James Hogan <jhogan@kernel.org> <james@albanarts.com>
|
||||
James Hogan <jhogan@kernel.org> <james.hogan@imgtec.com>
|
||||
James Ketrenos <jketreno@io.(none)>
|
||||
Jan Glauber <jan.glauber@gmail.com> <jang@de.ibm.com>
|
||||
Jan Glauber <jan.glauber@gmail.com> <jang@linux.vnet.ibm.com>
|
||||
Jan Glauber <jan.glauber@gmail.com> <jglauber@cavium.com>
|
||||
Jason Gunthorpe <jgg@ziepe.ca> <jgg@mellanox.com>
|
||||
Jason Gunthorpe <jgg@ziepe.ca> <jgg@nvidia.com>
|
||||
Jason Gunthorpe <jgg@ziepe.ca> <jgunthorpe@obsidianresearch.com>
|
||||
Javi Merino <javi.merino@kernel.org> <javi.merino@arm.com>
|
||||
<javier@osg.samsung.com> <javier.martinez@collabora.co.uk>
|
||||
Javi Merino <javi.merino@kernel.org> <javi.merino@arm.com>
|
||||
Jayachandran C <c.jayachandran@gmail.com> <jayachandranc@netlogicmicro.com>
|
||||
Jayachandran C <c.jayachandran@gmail.com> <jchandra@broadcom.com>
|
||||
Jayachandran C <c.jayachandran@gmail.com> <jchandra@digeo.com>
|
||||
Jayachandran C <c.jayachandran@gmail.com> <jnair@caviumnetworks.com>
|
||||
Jean Tourrilhes <jt@hpl.hp.com>
|
||||
<jean-philippe@linaro.org> <jean-philippe.brucker@arm.com>
|
||||
Jean Tourrilhes <jt@hpl.hp.com>
|
||||
Jeff Garzik <jgarzik@pretzel.yyz.us>
|
||||
Jeff Layton <jlayton@kernel.org> <jlayton@redhat.com>
|
||||
Jeff Layton <jlayton@kernel.org> <jlayton@poochiereds.net>
|
||||
Jeff Layton <jlayton@kernel.org> <jlayton@primarydata.com>
|
||||
Jeff Layton <jlayton@kernel.org> <jlayton@redhat.com>
|
||||
Jens Axboe <axboe@suse.de>
|
||||
Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
|
||||
Jiri Slaby <jirislaby@kernel.org> <jirislaby@gmail.com>
|
||||
|
|
@ -164,30 +170,31 @@ Julien Thierry <julien.thierry.kdev@gmail.com> <julien.thierry@arm.com>
|
|||
Kamil Konieczny <k.konieczny@samsung.com> <k.konieczny@partner.samsung.com>
|
||||
Kay Sievers <kay.sievers@vrfy.org>
|
||||
Kenneth W Chen <kenneth.w.chen@intel.com>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <khlebnikov@yandex-team.ru>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com>
|
||||
Koushik <raghavendra.koushik@neterion.com>
|
||||
Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski@samsung.com>
|
||||
Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski.k@gmail.com>
|
||||
Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski@samsung.com>
|
||||
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
|
||||
Leon Romanovsky <leon@kernel.org> <leon@leon.nu>
|
||||
Leon Romanovsky <leon@kernel.org> <leonro@mellanox.com>
|
||||
Leonardo Bras <leobras.c@gmail.com> <leonardo@linux.ibm.com>
|
||||
Leonid I Ananiev <leonid.i.ananiev@intel.com>
|
||||
Leon Romanovsky <leon@kernel.org> <leon@leon.nu>
|
||||
Leon Romanovsky <leon@kernel.org> <leonro@mellanox.com>
|
||||
Leon Romanovsky <leon@kernel.org> <leonro@nvidia.com>
|
||||
Linas Vepstas <linas@austin.ibm.com>
|
||||
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@web.de>
|
||||
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>
|
||||
Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org>
|
||||
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@web.de>
|
||||
Li Yang <leoyang.li@nxp.com> <leoli@freescale.com>
|
||||
Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org>
|
||||
Lukasz Luba <lukasz.luba@arm.com> <l.luba@partner.samsung.com>
|
||||
Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com>
|
||||
Marc Zyngier <maz@kernel.org> <marc.zyngier@arm.com>
|
||||
Marcin Nowakowski <marcin.nowakowski@mips.com> <marcin.nowakowski@imgtec.com>
|
||||
Marc Zyngier <maz@kernel.org> <marc.zyngier@arm.com>
|
||||
Mark Brown <broonie@sirena.org.uk>
|
||||
Mark Yao <markyao0591@gmail.com> <mark.yao@rock-chips.com>
|
||||
Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com>
|
||||
Martin Kepplinger <martink@posteo.de> <martin.kepplinger@ginzinger.com>
|
||||
Martin Kepplinger <martink@posteo.de> <martin.kepplinger@puri.sm>
|
||||
Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com>
|
||||
Mathieu Othacehe <m.othacehe@gmail.com>
|
||||
Matthew Wilcox <willy@infradead.org> <matthew.r.wilcox@intel.com>
|
||||
Matthew Wilcox <willy@infradead.org> <matthew@wil.cx>
|
||||
|
|
@ -197,17 +204,17 @@ Matthew Wilcox <willy@infradead.org> <willy@debian.org>
|
|||
Matthew Wilcox <willy@infradead.org> <willy@linux.intel.com>
|
||||
Matthew Wilcox <willy@infradead.org> <willy@parisc-linux.org>
|
||||
Matthieu CASTET <castet.matthieu@free.fr>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@brturbo.com.br>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@infradead.org>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@redhat.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <m.chehab@samsung.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@osg.samsung.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@s-opensource.com>
|
||||
Matt Ranostay <matt.ranostay@konsulko.com> <matt@ranostay.consulting>
|
||||
Matt Ranostay <mranostay@gmail.com> Matthew Ranostay <mranostay@embeddedalley.com>
|
||||
Matt Ranostay <mranostay@gmail.com> <matt.ranostay@intel.com>
|
||||
Matt Ranostay <matt.ranostay@konsulko.com> <matt@ranostay.consulting>
|
||||
Matt Redfearn <matt.redfearn@mips.com> <matt.redfearn@imgtec.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@brturbo.com.br>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@infradead.org>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@osg.samsung.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@redhat.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <m.chehab@samsung.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@s-opensource.com>
|
||||
Maxime Ripard <mripard@kernel.org> <maxime.ripard@bootlin.com>
|
||||
Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com>
|
||||
Mayuresh Janorkar <mayur@ti.com>
|
||||
|
|
@ -239,13 +246,13 @@ Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
|
|||
Patrick Mochel <mochel@digitalimplant.org>
|
||||
Paul Burton <paulburton@kernel.org> <paul.burton@imgtec.com>
|
||||
Paul Burton <paulburton@kernel.org> <paul.burton@mips.com>
|
||||
Paul E. McKenney <paulmck@kernel.org> <paul.mckenney@linaro.org>
|
||||
Paul E. McKenney <paulmck@kernel.org> <paulmck@linux.ibm.com>
|
||||
Paul E. McKenney <paulmck@kernel.org> <paulmck@linux.vnet.ibm.com>
|
||||
Paul E. McKenney <paulmck@kernel.org> <paul.mckenney@linaro.org>
|
||||
Paul E. McKenney <paulmck@kernel.org> <paulmck@us.ibm.com>
|
||||
Peter A Jonsson <pj@ludd.ltu.se>
|
||||
Peter Oruba <peter@oruba.de>
|
||||
Peter Oruba <peter.oruba@amd.com>
|
||||
Peter Oruba <peter@oruba.de>
|
||||
Pratyush Anand <pratyush.anand@gmail.com> <pratyush.anand@st.com>
|
||||
Praveen BP <praveenbp@ti.com>
|
||||
Punit Agrawal <punitagrawal@gmail.com> <punit.agrawal@arm.com>
|
||||
|
|
@ -258,23 +265,23 @@ Ralf Baechle <ralf@linux-mips.org>
|
|||
Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
||||
Randy Dunlap <rdunlap@infradead.org> <rdunlap@xenotime.net>
|
||||
Rémi Denis-Courmont <rdenis@simphalempin.com>
|
||||
Ricardo Ribalda <ribalda@kernel.org> <ricardo.ribalda@gmail.com>
|
||||
Ricardo Ribalda <ribalda@kernel.org> <ricardo@ribalda.com>
|
||||
Ricardo Ribalda <ribalda@kernel.org> Ricardo Ribalda Delgado <ribalda@kernel.org>
|
||||
Ricardo Ribalda <ribalda@kernel.org> <ricardo.ribalda@gmail.com>
|
||||
Ross Zwisler <zwisler@kernel.org> <ross.zwisler@linux.intel.com>
|
||||
Rudolf Marek <R.Marek@sh.cvut.cz>
|
||||
Rui Saraiva <rmps@joel.ist.utl.pt>
|
||||
Sachin P Sant <ssant@in.ibm.com>
|
||||
Sarangdhar Joshi <spjoshi@codeaurora.org>
|
||||
Sakari Ailus <sakari.ailus@linux.intel.com> <sakari.ailus@iki.fi>
|
||||
Sam Ravnborg <sam@mars.ravnborg.org>
|
||||
Santosh Shilimkar <ssantosh@kernel.org>
|
||||
Santosh Shilimkar <santosh.shilimkar@oracle.org>
|
||||
Santosh Shilimkar <ssantosh@kernel.org>
|
||||
Sarangdhar Joshi <spjoshi@codeaurora.org>
|
||||
Sascha Hauer <s.hauer@pengutronix.de>
|
||||
S.Çağlar Onur <caglar@pardus.org.tr>
|
||||
Sakari Ailus <sakari.ailus@linux.intel.com> <sakari.ailus@iki.fi>
|
||||
Sean Nyekjaer <sean@geanix.com> <sean.nyekjaer@prevas.dk>
|
||||
Sebastian Reichel <sre@kernel.org> <sre@debian.org>
|
||||
Sebastian Reichel <sre@kernel.org> <sebastian.reichel@collabora.co.uk>
|
||||
Sebastian Reichel <sre@kernel.org> <sre@debian.org>
|
||||
Sedat Dilek <sedat.dilek@gmail.com> <sedat.dilek@credativ.de>
|
||||
Shiraz Hashim <shiraz.linux.kernel@gmail.com> <shiraz.hashim@st.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuahkhan@gmail.com>
|
||||
|
|
@ -285,18 +292,21 @@ Simon Arlott <simon@octiron.net> <simon@fire.lp0.eu>
|
|||
Simon Kelley <simon@thekelleys.org.uk>
|
||||
Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
|
||||
Stephen Hemminger <shemminger@osdl.org>
|
||||
Steve Wise <larrystevenwise@gmail.com> <swise@chelsio.com>
|
||||
Steve Wise <larrystevenwise@gmail.com> <swise@opengridcomputing.com>
|
||||
Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
|
||||
Subhash Jadavani <subhashj@codeaurora.org>
|
||||
Sudeep Holla <sudeep.holla@arm.com> Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
|
||||
Sumit Semwal <sumit.semwal@ti.com>
|
||||
Takashi YOSHII <takashi.yoshii.zj@renesas.com>
|
||||
Tejun Heo <htejun@gmail.com>
|
||||
Thomas Graf <tgraf@suug.ch>
|
||||
Thomas Pedersen <twp@codeaurora.org>
|
||||
Tiezhu Yang <yangtiezhu@loongson.cn> <kernelpatch@126.com>
|
||||
Todor Tomov <todor.too@gmail.com> <todor.tomov@linaro.org>
|
||||
Tony Luck <tony.luck@intel.com>
|
||||
TripleX Chung <xxx.phy@gmail.com> <zhongyu@18mail.cn>
|
||||
TripleX Chung <xxx.phy@gmail.com> <triplex@zh-kernel.org>
|
||||
TripleX Chung <xxx.phy@gmail.com> <zhongyu@18mail.cn>
|
||||
Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com>
|
||||
Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
|
||||
Uwe Kleine-König <ukl@pengutronix.de>
|
||||
|
|
@ -305,22 +315,16 @@ Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
|
|||
Vinod Koul <vkoul@kernel.org> <vinod.koul@intel.com>
|
||||
Vinod Koul <vkoul@kernel.org> <vinod.koul@linux.intel.com>
|
||||
Vinod Koul <vkoul@kernel.org> <vkoul@infradead.org>
|
||||
Viresh Kumar <vireshk@kernel.org> <viresh.kumar2@arm.com>
|
||||
Viresh Kumar <vireshk@kernel.org> <viresh.kumar@st.com>
|
||||
Viresh Kumar <vireshk@kernel.org> <viresh.linux@gmail.com>
|
||||
Viresh Kumar <vireshk@kernel.org> <viresh.kumar2@arm.com>
|
||||
Vivien Didelot <vivien.didelot@gmail.com> <vivien.didelot@savoirfairelinux.com>
|
||||
Vlad Dogaru <ddvlad@gmail.com> <vlad.dogaru@intel.com>
|
||||
Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@virtuozzo.com>
|
||||
Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@parallels.com>
|
||||
Takashi YOSHII <takashi.yoshii.zj@renesas.com>
|
||||
Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@virtuozzo.com>
|
||||
WeiXiong Liao <gmpy.liaowx@gmail.com> <liaoweixiong@allwinnertech.com>
|
||||
Will Deacon <will@kernel.org> <will.deacon@arm.com>
|
||||
Wolfram Sang <wsa@kernel.org> <wsa@the-dreams.de>
|
||||
Wolfram Sang <wsa@kernel.org> <w.sang@pengutronix.de>
|
||||
Wolfram Sang <wsa@kernel.org> <wsa@the-dreams.de>
|
||||
Yakir Yang <kuankuan.y@gmail.com> <ykk@rock-chips.com>
|
||||
Yusuke Goda <goda.yusuke@renesas.com>
|
||||
Gustavo Padovan <gustavo@las.ic.unicamp.br>
|
||||
Gustavo Padovan <padovan@profusion.mobi>
|
||||
Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>
|
||||
Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>
|
||||
Steve Wise <larrystevenwise@gmail.com> <swise@chelsio.com>
|
||||
Steve Wise <larrystevenwise@gmail.com> <swise@opengridcomputing.com>
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@ Description: read only
|
|||
This sysfs interface exposes the number of cores per chip
|
||||
present in the system.
|
||||
|
||||
What: /sys/devices/hv_24x7/interface/cpumask
|
||||
What: /sys/devices/hv_24x7/cpumask
|
||||
Date: July 2020
|
||||
Contact: Linux on PowerPC Developer List <linuxppc-dev@lists.ozlabs.org>
|
||||
Description: read only
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@ checking of rcu_dereference() primitives:
|
|||
is invoked by both RCU-sched readers and updaters.
|
||||
srcu_dereference_check(p, c):
|
||||
Use explicit check expression "c" along with
|
||||
srcu_read_lock_held()(). This is useful in code that
|
||||
srcu_read_lock_held(). This is useful in code that
|
||||
is invoked by both SRCU readers and updaters.
|
||||
rcu_dereference_raw(p):
|
||||
Don't check. (Use sparingly, if at all.)
|
||||
|
|
|
|||
|
|
@ -1662,7 +1662,7 @@
|
|||
|
||||
98 block User-mode virtual block device
|
||||
0 = /dev/ubda First user-mode block device
|
||||
16 = /dev/udbb Second user-mode block device
|
||||
16 = /dev/ubdb Second user-mode block device
|
||||
...
|
||||
|
||||
Partitions are handled in the same way as for IDE
|
||||
|
|
|
|||
|
|
@ -489,6 +489,9 @@ Files in /sys/fs/ext4/<devname>:
|
|||
multiple of this tuning parameter if the stripe size is not set in the
|
||||
ext4 superblock
|
||||
|
||||
mb_max_inode_prealloc
|
||||
The maximum length of per-inode ext4_prealloc_space list.
|
||||
|
||||
mb_max_to_scan
|
||||
The maximum number of extents the multiblock allocator will search to
|
||||
find the best extent.
|
||||
|
|
@ -529,21 +532,21 @@ Files in /sys/fs/ext4/<devname>:
|
|||
Ioctls
|
||||
======
|
||||
|
||||
There is some Ext4 specific functionality which can be accessed by applications
|
||||
through the system call interfaces. The list of all Ext4 specific ioctls are
|
||||
shown in the table below.
|
||||
Ext4 implements various ioctls which can be used by applications to access
|
||||
ext4-specific functionality. An incomplete list of these ioctls is shown in the
|
||||
table below. This list includes truly ext4-specific ioctls (``EXT4_IOC_*``) as
|
||||
well as ioctls that may have been ext4-specific originally but are now supported
|
||||
by some other filesystem(s) too (``FS_IOC_*``).
|
||||
|
||||
Table of Ext4 specific ioctls
|
||||
Table of Ext4 ioctls
|
||||
|
||||
EXT4_IOC_GETFLAGS
|
||||
FS_IOC_GETFLAGS
|
||||
Get additional attributes associated with inode. The ioctl argument is
|
||||
an integer bitfield, with bit values described in ext4.h. This ioctl is
|
||||
an alias for FS_IOC_GETFLAGS.
|
||||
an integer bitfield, with bit values described in ext4.h.
|
||||
|
||||
EXT4_IOC_SETFLAGS
|
||||
FS_IOC_SETFLAGS
|
||||
Set additional attributes associated with inode. The ioctl argument is
|
||||
an integer bitfield, with bit values described in ext4.h. This ioctl is
|
||||
an alias for FS_IOC_SETFLAGS.
|
||||
an integer bitfield, with bit values described in ext4.h.
|
||||
|
||||
EXT4_IOC_GETVERSION, EXT4_IOC_GETVERSION_OLD
|
||||
Get the inode i_generation number stored for each inode. The
|
||||
|
|
|
|||
|
|
@ -1233,8 +1233,7 @@
|
|||
efi= [EFI]
|
||||
Format: { "debug", "disable_early_pci_dma",
|
||||
"nochunk", "noruntime", "nosoftreserve",
|
||||
"novamap", "no_disable_early_pci_dma",
|
||||
"old_map" }
|
||||
"novamap", "no_disable_early_pci_dma" }
|
||||
debug: enable misc debug output.
|
||||
disable_early_pci_dma: disable the busmaster bit on all
|
||||
PCI bridges while in the EFI boot stub.
|
||||
|
|
@ -1251,8 +1250,6 @@
|
|||
novamap: do not call SetVirtualAddressMap().
|
||||
no_disable_early_pci_dma: Leave the busmaster bit set
|
||||
on all PCI bridges while in the EFI boot stub
|
||||
old_map [X86-64]: switch to the old ioremap-based EFI
|
||||
runtime services mapping. [Needs CONFIG_X86_UV=y]
|
||||
|
||||
efi_no_storage_paranoia [EFI; X86]
|
||||
Using this parameter you can use more than 50% of
|
||||
|
|
|
|||
|
|
@ -1434,7 +1434,7 @@ on the feature, restricting the viewing angles.
|
|||
|
||||
|
||||
DYTC Lapmode sensor
|
||||
------------------
|
||||
-------------------
|
||||
|
||||
sysfs: dytc_lapmode
|
||||
|
||||
|
|
|
|||
|
|
@ -123,7 +123,9 @@ Energy-Performance Bias (EPB) knob (otherwise), which means that the processor's
|
|||
internal P-state selection logic is expected to focus entirely on performance.
|
||||
|
||||
This will override the EPP/EPB setting coming from the ``sysfs`` interface
|
||||
(see `Energy vs Performance Hints`_ below).
|
||||
(see `Energy vs Performance Hints`_ below). Moreover, any attempts to change
|
||||
the EPP/EPB to a value different from 0 ("performance") via ``sysfs`` in this
|
||||
configuration will be rejected.
|
||||
|
||||
Also, in this configuration the range of P-states available to the processor's
|
||||
internal P-state selection logic is always restricted to the upper boundary
|
||||
|
|
@ -564,8 +566,8 @@ Energy-Performance Preference (EPP) knob (if supported) or its
|
|||
Energy-Performance Bias (EPB) knob. It is also possible to write a positive
|
||||
integer value between 0 to 255, if the EPP feature is present. If the EPP
|
||||
feature is not present, writing integer value to this attribute is not
|
||||
supported. In this case, user can use
|
||||
"/sys/devices/system/cpu/cpu*/power/energy_perf_bias" interface.
|
||||
supported. In this case, user can use the
|
||||
"/sys/devices/system/cpu/cpu*/power/energy_perf_bias" interface.
|
||||
|
||||
[Note that tasks may by migrated from one CPU to another by the scheduler's
|
||||
load-balancing algorithm and if different energy vs performance hints are
|
||||
|
|
|
|||
|
|
@ -36,6 +36,12 @@ Two sets of Questions and Answers (Q&A) are maintained.
|
|||
bpf_devel_QA
|
||||
|
||||
|
||||
Helper functions
|
||||
================
|
||||
|
||||
* `bpf-helpers(7)`_ maintains a list of helpers available to eBPF programs.
|
||||
|
||||
|
||||
Program types
|
||||
=============
|
||||
|
||||
|
|
@ -79,4 +85,5 @@ Other
|
|||
.. _networking-filter: ../networking/filter.rst
|
||||
.. _man-pages: https://www.kernel.org/doc/man-pages/
|
||||
.. _bpf(2): https://man7.org/linux/man-pages/man2/bpf.2.html
|
||||
.. _bpf-helpers(7): https://man7.org/linux/man-pages/man7/bpf-helpers.7.html
|
||||
.. _BPF and XDP Reference Guide: https://docs.cilium.io/en/latest/bpf/
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Clock bindings for Freescale i.MX23
|
||||
|
||||
maintainers:
|
||||
- Shawn Guo <shawn.guo@linaro.org>
|
||||
- Shawn Guo <shawnguo@kernel.org>
|
||||
|
||||
description: |
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Clock bindings for Freescale i.MX28
|
||||
|
||||
maintainers:
|
||||
- Shawn Guo <shawn.guo@linaro.org>
|
||||
- Shawn Guo <shawnguo@kernel.org>
|
||||
|
||||
description: |
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Freescale MXS GPIO controller
|
||||
|
||||
maintainers:
|
||||
- Shawn Guo <shawn.guo@linaro.org>
|
||||
- Shawn Guo <shawnguo@kernel.org>
|
||||
- Anson Huang <Anson.Huang@nxp.com>
|
||||
|
||||
description: |
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Freescale MXS Inter IC (I2C) Controller
|
||||
|
||||
maintainers:
|
||||
- Shawn Guo <shawn.guo@linaro.org>
|
||||
- Shawn Guo <shawnguo@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -0,0 +1,65 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interrupt-controller/actions,owl-sirq.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Actions Semi Owl SoCs SIRQ interrupt controller
|
||||
|
||||
maintainers:
|
||||
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
- Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
|
||||
|
||||
description: |
|
||||
This interrupt controller is found in the Actions Semi Owl SoCs (S500, S700
|
||||
and S900) and provides support for handling up to 3 external interrupt lines.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- actions,s500-sirq
|
||||
- actions,s700-sirq
|
||||
- actions,s900-sirq
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
'#interrupt-cells':
|
||||
const: 2
|
||||
description:
|
||||
The first cell is the input IRQ number, between 0 and 2, while the second
|
||||
cell is the trigger type as defined in interrupt.txt in this directory.
|
||||
|
||||
'interrupts':
|
||||
description: |
|
||||
Contains the GIC SPI IRQs mapped to the external interrupt lines.
|
||||
They shall be specified sequentially from output 0 to 2.
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupt-controller
|
||||
- '#interrupt-cells'
|
||||
- 'interrupts'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
sirq: interrupt-controller@b01b0200 {
|
||||
compatible = "actions,s500-sirq";
|
||||
reg = <0xb01b0200 0x4>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ0 */
|
||||
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ1 */
|
||||
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; /* SIRQ2 */
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interrupt-controller/mstar,mst-intc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MStar Interrupt Controller
|
||||
|
||||
maintainers:
|
||||
- Mark-PK Tsai <mark-pk.tsai@mediatek.com>
|
||||
|
||||
description: |+
|
||||
MStar, SigmaStar and Mediatek TV SoCs contain multiple legacy
|
||||
interrupt controllers that routes interrupts to the GIC.
|
||||
|
||||
The HW block exposes a number of interrupt controllers, each
|
||||
can support up to 64 interrupts.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: mstar,mst-intc
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
"#interrupt-cells":
|
||||
const: 3
|
||||
description: |
|
||||
Use the same format as specified by GIC in arm,gic.yaml.
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
mstar,irqs-map-range:
|
||||
description: |
|
||||
The range <start, end> of parent interrupt controller's interrupt
|
||||
lines that are hardwired to mstar interrupt controller.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-matrix
|
||||
items:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
|
||||
mstar,intc-no-eoi:
|
||||
description:
|
||||
Mark this controller has no End Of Interrupt(EOI) implementation.
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- mstar,irqs-map-range
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
mst_intc0: interrupt-controller@1f2032d0 {
|
||||
compatible = "mstar,mst-intc";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-parent = <&gic>;
|
||||
reg = <0x1f2032d0 0x30>;
|
||||
mstar,irqs-map-range = <0 63>;
|
||||
};
|
||||
...
|
||||
|
|
@ -2,7 +2,8 @@ Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
|
|||
|
||||
Synopsys DesignWare provides interrupt controller IP for APB known as
|
||||
dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with
|
||||
APB bus, e.g. Marvell Armada 1500.
|
||||
APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt
|
||||
controller in some SoCs, e.g. Hisilicon SD5203.
|
||||
|
||||
Required properties:
|
||||
- compatible: shall be "snps,dw-apb-ictl"
|
||||
|
|
@ -10,6 +11,8 @@ Required properties:
|
|||
region starting with ENABLE_LOW register
|
||||
- interrupt-controller: identifies the node as an interrupt controller
|
||||
- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1
|
||||
|
||||
Additional required property when it's used as secondary interrupt controller:
|
||||
- interrupts: interrupt reference to primary interrupt controller
|
||||
|
||||
The interrupt sources map to the corresponding bits in the interrupt
|
||||
|
|
@ -21,6 +24,7 @@ registers, i.e.
|
|||
- (optional) fast interrupts start at 64.
|
||||
|
||||
Example:
|
||||
/* dw_apb_ictl is used as secondary interrupt controller */
|
||||
aic: interrupt-controller@3000 {
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = <0x3000 0xc00>;
|
||||
|
|
@ -29,3 +33,11 @@ Example:
|
|||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
/* dw_apb_ictl is used as primary interrupt controller */
|
||||
vic: interrupt-controller@10130000 {
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = <0x10130000 0x1000>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,158 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interrupt-controller/ti,pruss-intc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI PRU-ICSS Local Interrupt Controller
|
||||
|
||||
maintainers:
|
||||
- Suman Anna <s-anna@ti.com>
|
||||
|
||||
description: |
|
||||
Each PRU-ICSS has a single interrupt controller instance that is common
|
||||
to all the PRU cores. Most interrupt controllers can route 64 input events
|
||||
which are then mapped to 10 possible output interrupts through two levels
|
||||
of mapping. The input events can be triggered by either the PRUs and/or
|
||||
various other PRUSS internal and external peripherals. The first 2 output
|
||||
interrupts (0, 1) are fed exclusively to the internal PRU cores, with the
|
||||
remaining 8 (2 through 9) connected to external interrupt controllers
|
||||
including the MPU and/or other PRUSS instances, DSPs or devices.
|
||||
|
||||
The property "ti,irqs-reserved" is used for denoting the connection
|
||||
differences on the output interrupts 2 through 9. If this property is not
|
||||
defined, it implies that all the PRUSS INTC output interrupts 2 through 9
|
||||
(host_intr0 through host_intr7) are connected exclusively to the Arm interrupt
|
||||
controller.
|
||||
|
||||
The K3 family of SoCs can handle 160 input events that can be mapped to 20
|
||||
different possible output interrupts. The additional output interrupts (10
|
||||
through 19) are connected to new sub-modules within the ICSSG instances.
|
||||
|
||||
This interrupt-controller node should be defined as a child node of the
|
||||
corresponding PRUSS node. The node should be named "interrupt-controller".
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ti,pruss-intc
|
||||
- ti,icssg-intc
|
||||
description: |
|
||||
Use "ti,pruss-intc" for OMAP-L13x/AM18x/DA850 SoCs,
|
||||
AM335x family of SoCs,
|
||||
AM437x family of SoCs,
|
||||
AM57xx family of SoCs
|
||||
66AK2G family of SoCs
|
||||
Use "ti,icssg-intc" for K3 AM65x & J721E family of SoCs
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
description: |
|
||||
All the interrupts generated towards the main host processor in the SoC.
|
||||
A shared interrupt can be skipped if the desired destination and usage is
|
||||
by a different processor/device.
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
items:
|
||||
pattern: host_intr[0-7]
|
||||
description: |
|
||||
Should use one of the above names for each valid host event interrupt
|
||||
connected to Arm interrupt controller, the name should match the
|
||||
corresponding host event interrupt number.
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
"#interrupt-cells":
|
||||
const: 3
|
||||
description: |
|
||||
Client users shall use the PRU System event number (the interrupt source
|
||||
that the client is interested in) [cell 1], PRU channel [cell 2] and PRU
|
||||
host_event (target) [cell 3] as the value of the interrupts property in
|
||||
their node. The system events can be mapped to some output host
|
||||
interrupts through 2 levels of many-to-one mapping i.e. events to channel
|
||||
mapping and channels to host interrupts so through this property entire
|
||||
mapping is provided.
|
||||
|
||||
ti,irqs-reserved:
|
||||
$ref: /schemas/types.yaml#definitions/uint8
|
||||
description: |
|
||||
Bitmask of host interrupts between 0 and 7 (corresponding to PRUSS INTC
|
||||
output interrupts 2 through 9) that are not connected to the Arm interrupt
|
||||
controller or are shared and used by other devices or processors in the
|
||||
SoC. Define this property when any of 8 interrupts should not be handled
|
||||
by Arm interrupt controller.
|
||||
Eg: - AM437x and 66AK2G SoCs do not have "host_intr5" interrupt
|
||||
connected to MPU
|
||||
- AM65x and J721E SoCs have "host_intr5", "host_intr6" and
|
||||
"host_intr7" interrupts connected to MPU, and other ICSSG
|
||||
instances.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- interrupt-controller
|
||||
- "#interrupt-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
/* AM33xx PRU-ICSS */
|
||||
pruss: pruss@0 {
|
||||
compatible = "ti,am3356-pruss";
|
||||
reg = <0x0 0x80000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
pruss_intc: interrupt-controller@20000 {
|
||||
compatible = "ti,pruss-intc";
|
||||
reg = <0x20000 0x2000>;
|
||||
interrupts = <20 21 22 23 24 25 26 27>;
|
||||
interrupt-names = "host_intr0", "host_intr1",
|
||||
"host_intr2", "host_intr3",
|
||||
"host_intr4", "host_intr5",
|
||||
"host_intr6", "host_intr7";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
|
||||
/* AM4376 PRU-ICSS */
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
pruss@0 {
|
||||
compatible = "ti,am4376-pruss";
|
||||
reg = <0x0 0x40000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
interrupt-controller@20000 {
|
||||
compatible = "ti,pruss-intc";
|
||||
reg = <0x20000 0x2000>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "host_intr0", "host_intr1",
|
||||
"host_intr2", "host_intr3",
|
||||
"host_intr4",
|
||||
"host_intr6", "host_intr7";
|
||||
ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
|
||||
};
|
||||
};
|
||||
|
|
@ -32,6 +32,11 @@ description: |
|
|||
| | vint | bit | | 0 |.....|63| vintx |
|
||||
| +--------------+ +------------+ |
|
||||
| |
|
||||
| Unmap |
|
||||
| +--------------+ |
|
||||
Unmapped events ----->| | umapidx |-------------------------> Globalevents
|
||||
| +--------------+ |
|
||||
| |
|
||||
+-----------------------------------------+
|
||||
|
||||
Configuration of these Intmap registers that maps global events to vint is
|
||||
|
|
@ -70,6 +75,11 @@ properties:
|
|||
- description: |
|
||||
"limit" specifies the limit for translation
|
||||
|
||||
ti,unmapped-event-sources:
|
||||
$ref: /schemas/types.yaml#definitions/phandle-array
|
||||
description:
|
||||
Array of phandles to DMA controllers where the unmapped events originate.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -30,9 +30,13 @@ allOf:
|
|||
then:
|
||||
properties:
|
||||
clock-output-names:
|
||||
items:
|
||||
- const: clk_out_sd0
|
||||
- const: clk_in_sd0
|
||||
oneOf:
|
||||
- items:
|
||||
- const: clk_out_sd0
|
||||
- const: clk_in_sd0
|
||||
- items:
|
||||
- const: clk_out_sd1
|
||||
- const: clk_in_sd1
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
|
||||
|
||||
maintainers:
|
||||
- Shawn Guo <shawn.guo@linaro.org>
|
||||
- Shawn Guo <shawnguo@kernel.org>
|
||||
|
||||
allOf:
|
||||
- $ref: "mmc-controller.yaml"
|
||||
|
|
|
|||
|
|
@ -50,6 +50,8 @@ Optional properties:
|
|||
error caused by stop clock(fifo full)
|
||||
Valid range = [0:0x7]. if not present, default value is 0.
|
||||
applied to compatible "mediatek,mt2701-mmc".
|
||||
- resets: Phandle and reset specifier pair to softreset line of MSDC IP.
|
||||
- reset-names: Should be "hrst".
|
||||
|
||||
Examples:
|
||||
mmc0: mmc@11230000 {
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Freescale MXS MMC controller
|
||||
|
||||
maintainers:
|
||||
- Shawn Guo <shawn.guo@linaro.org>
|
||||
- Shawn Guo <shawnguo@kernel.org>
|
||||
|
||||
description: |
|
||||
The Freescale MXS Synchronous Serial Ports (SSP) can act as a MMC controller
|
||||
|
|
|
|||
|
|
@ -15,8 +15,15 @@ Required properties:
|
|||
- "nvidia,tegra210-sdhci": for Tegra210
|
||||
- "nvidia,tegra186-sdhci": for Tegra186
|
||||
- "nvidia,tegra194-sdhci": for Tegra194
|
||||
- clocks : Must contain one entry, for the module clock.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
- clocks: For Tegra210, Tegra186 and Tegra194 must contain two entries.
|
||||
One for the module clock and one for the timeout clock.
|
||||
For all other Tegra devices, must contain a single entry for
|
||||
the module clock. See ../clocks/clock-bindings.txt for details.
|
||||
- clock-names: For Tegra210, Tegra186 and Tegra194 must contain the
|
||||
strings 'sdhci' and 'tmclk' to represent the module and
|
||||
the timeout clocks, respectively.
|
||||
For all other Tegra devices must contain the string 'sdhci'
|
||||
to represent the module clock.
|
||||
- resets : Must contain an entry for each entry in reset-names.
|
||||
See ../reset/reset.txt for details.
|
||||
- reset-names : Must include the following entries:
|
||||
|
|
@ -99,7 +106,7 @@ Optional properties for Tegra210, Tegra186 and Tegra194:
|
|||
|
||||
Example:
|
||||
sdhci@700b0000 {
|
||||
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
|
||||
compatible = "nvidia,tegra124-sdhci";
|
||||
reg = <0x0 0x700b0000 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
|
||||
|
|
@ -115,3 +122,22 @@ sdhci@700b0000 {
|
|||
nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhci@700b0000 {
|
||||
compatible = "nvidia,tegra210-sdhci";
|
||||
reg = <0x0 0x700b0000 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
|
||||
<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&tegra_car 14>;
|
||||
reset-names = "sdhci";
|
||||
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
|
||||
pinctrl-0 = <&sdmmc1_3v3>;
|
||||
pinctrl-1 = <&sdmmc1_1v8>;
|
||||
nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>;
|
||||
nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>;
|
||||
nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>;
|
||||
nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
Distributed Switch Architecture Device Tree Bindings
|
||||
----------------------------------------------------
|
||||
|
||||
See Documentation/devicetree/bindings/net/dsa/dsa.yaml for the documenation.
|
||||
See Documentation/devicetree/bindings/net/dsa/dsa.yaml for the documentation.
|
||||
|
|
|
|||
|
|
@ -54,7 +54,8 @@ properties:
|
|||
|
||||
phy-connection-type:
|
||||
description:
|
||||
Operation mode of the PHY interface
|
||||
Specifies interface type between the Ethernet device and a physical
|
||||
layer (PHY) device.
|
||||
enum:
|
||||
# There is not a standard bus between the MAC and the PHY,
|
||||
# something proprietary is being used to embed the PHY in the
|
||||
|
|
|
|||
|
|
@ -59,9 +59,15 @@ properties:
|
|||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
pinctrl-0: true
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
pinctrl-names: true
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
phy-mode: true
|
||||
|
||||
phy-handle: true
|
||||
|
||||
renesas,no-ether-link:
|
||||
type: boolean
|
||||
|
|
@ -74,6 +80,11 @@ properties:
|
|||
specify when the Ether LINK signal is active-low instead of normal
|
||||
active-high
|
||||
|
||||
patternProperties:
|
||||
"^ethernet-phy@[0-9a-f]$":
|
||||
type: object
|
||||
$ref: ethernet-phy.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
@ -83,7 +94,8 @@ required:
|
|||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
- clocks
|
||||
- pinctrl-0
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
# Lager board
|
||||
|
|
@ -99,8 +111,6 @@ examples:
|
|||
clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
|
||||
phy-mode = "rmii";
|
||||
phy-handle = <&phy1>;
|
||||
pinctrl-0 = <ðer_pins>;
|
||||
pinctrl-names = "default";
|
||||
renesas,ether-link-active-low;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -109,7 +119,5 @@ examples:
|
|||
reg = <1>;
|
||||
interrupt-parent = <&irqc0>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-0 = <&phy1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -9,6 +9,14 @@ title: PCIe RC controller on Intel Gateway SoCs
|
|||
maintainers:
|
||||
- Dilip Kota <eswara.kota@linux.intel.com>
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: intel,lgm-pcie
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Freescale MXS PWM controller
|
||||
|
||||
maintainers:
|
||||
- Shawn Guo <shawn.guo@linaro.org>
|
||||
- Shawn Guo <shawnguo@kernel.org>
|
||||
- Anson Huang <anson.huang@nxp.com>
|
||||
|
||||
properties:
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Freescale (Enhanced) Configurable Serial Peripheral Interface (CSPI/eCSPI) for i.MX
|
||||
|
||||
maintainers:
|
||||
- Shawn Guo <shawn.guo@linaro.org>
|
||||
- Shawn Guo <shawnguo@kernel.org>
|
||||
|
||||
allOf:
|
||||
- $ref: "/schemas/spi/spi-controller.yaml#"
|
||||
|
|
|
|||
|
|
@ -39,6 +39,7 @@ properties:
|
|||
spi common code does not support use of CS signals discontinuously.
|
||||
i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
|
||||
this property to re-config the chipselect value in the LPSPI driver.
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: NXP i.MX Thermal Binding
|
||||
|
||||
maintainers:
|
||||
- Shawn Guo <shawn.guo@linaro.org>
|
||||
- Shawn Guo <shawnguo@kernel.org>
|
||||
- Anson Huang <Anson.Huang@nxp.com>
|
||||
|
||||
properties:
|
||||
|
|
|
|||
|
|
@ -0,0 +1,60 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/timer/sifive,clint.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: SiFive Core Local Interruptor
|
||||
|
||||
maintainers:
|
||||
- Palmer Dabbelt <palmer@dabbelt.com>
|
||||
- Anup Patel <anup.patel@wdc.com>
|
||||
|
||||
description:
|
||||
SiFive (and other RISC-V) SOCs include an implementation of the SiFive
|
||||
Core Local Interruptor (CLINT) for M-mode timer and M-mode inter-processor
|
||||
interrupts. It directly connects to the timer and inter-processor interrupt
|
||||
lines of various HARTs (or CPUs) so RISC-V per-HART (or per-CPU) local
|
||||
interrupt controller is the parent interrupt controller for CLINT device.
|
||||
The clock frequency of CLINT is specified via "timebase-frequency" DT
|
||||
property of "/cpus" DT node. The "timebase-frequency" DT property is
|
||||
described in Documentation/devicetree/bindings/riscv/cpus.yaml
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: sifive,fu540-c000-clint
|
||||
- const: sifive,clint0
|
||||
|
||||
description:
|
||||
Should be "sifive,<chip>-clint" and "sifive,clint<version>".
|
||||
Supported compatible strings are -
|
||||
"sifive,fu540-c000-clint" for the SiFive CLINT v0 as integrated
|
||||
onto the SiFive FU540 chip, and "sifive,clint0" for the SiFive
|
||||
CLINT v0 IP block with no chip integration tweaks.
|
||||
Please refer to sifive-blocks-ip-versioning.txt for details
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts-extended:
|
||||
minItems: 1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts-extended
|
||||
|
||||
examples:
|
||||
- |
|
||||
timer@2000000 {
|
||||
compatible = "sifive,fu540-c000-clint", "sifive,clint0";
|
||||
interrupts-extended = <&cpu1intc 3 &cpu1intc 7
|
||||
&cpu2intc 3 &cpu2intc 7
|
||||
&cpu3intc 3 &cpu3intc 7
|
||||
&cpu4intc 3 &cpu4intc 7>;
|
||||
reg = <0x2000000 0x10000>;
|
||||
};
|
||||
...
|
||||
|
|
@ -993,7 +993,7 @@ patternProperties:
|
|||
"^sst,.*":
|
||||
description: Silicon Storage Technology, Inc.
|
||||
"^sstar,.*":
|
||||
description: Xiamen Xingchen(SigmaStar) Technology Co., Ltd.
|
||||
description: Xiamen Xingchen(SigmaStar) Technology Co., Ltd.
|
||||
(formerly part of MStar Semiconductor, Inc.)
|
||||
"^st,.*":
|
||||
description: STMicroelectronics
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@ Writing DeviceTree Bindings in json-schema
|
|||
|
||||
Devicetree bindings are written using json-schema vocabulary. Schema files are
|
||||
written in a JSON compatible subset of YAML. YAML is used instead of JSON as it
|
||||
considered more human readable and has some advantages such as allowing
|
||||
is considered more human readable and has some advantages such as allowing
|
||||
comments (Prefixed with '#').
|
||||
|
||||
Schema Contents
|
||||
|
|
@ -19,7 +19,7 @@ $id
|
|||
A json-schema unique identifier string. The string must be a valid
|
||||
URI typically containing the binding's filename and path. For DT schema, it must
|
||||
begin with "http://devicetree.org/schemas/". The URL is used in constructing
|
||||
references to other files specified in schema "$ref" properties. A $ref values
|
||||
references to other files specified in schema "$ref" properties. A $ref value
|
||||
with a leading '/' will have the hostname prepended. A $ref value a relative
|
||||
path or filename only will be prepended with the hostname and path components
|
||||
of the current schema file's '$id' value. A URL is used even for local files,
|
||||
|
|
|
|||
|
|
@ -6,9 +6,9 @@ API to implement a new FPGA bridge
|
|||
|
||||
* struct :c:type:`fpga_bridge` — The FPGA Bridge structure
|
||||
* struct :c:type:`fpga_bridge_ops` — Low level Bridge driver ops
|
||||
* :c:func:`devm_fpga_bridge_create()` — Allocate and init a bridge struct
|
||||
* :c:func:`fpga_bridge_register()` — Register a bridge
|
||||
* :c:func:`fpga_bridge_unregister()` — Unregister a bridge
|
||||
* devm_fpga_bridge_create() — Allocate and init a bridge struct
|
||||
* fpga_bridge_register() — Register a bridge
|
||||
* fpga_bridge_unregister() — Unregister a bridge
|
||||
|
||||
.. kernel-doc:: include/linux/fpga/fpga-bridge.h
|
||||
:functions: fpga_bridge
|
||||
|
|
|
|||
|
|
@ -104,9 +104,9 @@ API for implementing a new FPGA Manager driver
|
|||
* ``fpga_mgr_states`` — Values for :c:member:`fpga_manager->state`.
|
||||
* struct :c:type:`fpga_manager` — the FPGA manager struct
|
||||
* struct :c:type:`fpga_manager_ops` — Low level FPGA manager driver ops
|
||||
* :c:func:`devm_fpga_mgr_create` — Allocate and init a manager struct
|
||||
* :c:func:`fpga_mgr_register` — Register an FPGA manager
|
||||
* :c:func:`fpga_mgr_unregister` — Unregister an FPGA manager
|
||||
* devm_fpga_mgr_create() — Allocate and init a manager struct
|
||||
* fpga_mgr_register() — Register an FPGA manager
|
||||
* fpga_mgr_unregister() — Unregister an FPGA manager
|
||||
|
||||
.. kernel-doc:: include/linux/fpga/fpga-mgr.h
|
||||
:functions: fpga_mgr_states
|
||||
|
|
|
|||
|
|
@ -6,9 +6,9 @@ Overview
|
|||
|
||||
The in-kernel API for FPGA programming is a combination of APIs from
|
||||
FPGA manager, bridge, and regions. The actual function used to
|
||||
trigger FPGA programming is :c:func:`fpga_region_program_fpga()`.
|
||||
trigger FPGA programming is fpga_region_program_fpga().
|
||||
|
||||
:c:func:`fpga_region_program_fpga()` uses functionality supplied by
|
||||
fpga_region_program_fpga() uses functionality supplied by
|
||||
the FPGA manager and bridges. It will:
|
||||
|
||||
* lock the region's mutex
|
||||
|
|
@ -20,8 +20,8 @@ the FPGA manager and bridges. It will:
|
|||
* release the locks
|
||||
|
||||
The struct fpga_image_info specifies what FPGA image to program. It is
|
||||
allocated/freed by :c:func:`fpga_image_info_alloc()` and freed with
|
||||
:c:func:`fpga_image_info_free()`
|
||||
allocated/freed by fpga_image_info_alloc() and freed with
|
||||
fpga_image_info_free()
|
||||
|
||||
How to program an FPGA using a region
|
||||
-------------------------------------
|
||||
|
|
@ -84,10 +84,10 @@ will generate that list. Here's some sample code of what to do next::
|
|||
API for programming an FPGA
|
||||
---------------------------
|
||||
|
||||
* :c:func:`fpga_region_program_fpga` — Program an FPGA
|
||||
* :c:type:`fpga_image_info` — Specifies what FPGA image to program
|
||||
* :c:func:`fpga_image_info_alloc()` — Allocate an FPGA image info struct
|
||||
* :c:func:`fpga_image_info_free()` — Free an FPGA image info struct
|
||||
* fpga_region_program_fpga() — Program an FPGA
|
||||
* fpga_image_info() — Specifies what FPGA image to program
|
||||
* fpga_image_info_alloc() — Allocate an FPGA image info struct
|
||||
* fpga_image_info_free() — Free an FPGA image info struct
|
||||
|
||||
.. kernel-doc:: drivers/fpga/fpga-region.c
|
||||
:functions: fpga_region_program_fpga
|
||||
|
|
|
|||
|
|
@ -46,18 +46,18 @@ API to add a new FPGA region
|
|||
----------------------------
|
||||
|
||||
* struct :c:type:`fpga_region` — The FPGA region struct
|
||||
* :c:func:`devm_fpga_region_create` — Allocate and init a region struct
|
||||
* :c:func:`fpga_region_register` — Register an FPGA region
|
||||
* :c:func:`fpga_region_unregister` — Unregister an FPGA region
|
||||
* devm_fpga_region_create() — Allocate and init a region struct
|
||||
* fpga_region_register() — Register an FPGA region
|
||||
* fpga_region_unregister() — Unregister an FPGA region
|
||||
|
||||
The FPGA region's probe function will need to get a reference to the FPGA
|
||||
Manager it will be using to do the programming. This usually would happen
|
||||
during the region's probe function.
|
||||
|
||||
* :c:func:`fpga_mgr_get` — Get a reference to an FPGA manager, raise ref count
|
||||
* :c:func:`of_fpga_mgr_get` — Get a reference to an FPGA manager, raise ref count,
|
||||
* fpga_mgr_get() — Get a reference to an FPGA manager, raise ref count
|
||||
* of_fpga_mgr_get() — Get a reference to an FPGA manager, raise ref count,
|
||||
given a device node.
|
||||
* :c:func:`fpga_mgr_put` — Put an FPGA manager
|
||||
* fpga_mgr_put() — Put an FPGA manager
|
||||
|
||||
The FPGA region will need to specify which bridges to control while programming
|
||||
the FPGA. The region driver can build a list of bridges during probe time
|
||||
|
|
@ -66,11 +66,11 @@ the list of bridges to program just before programming
|
|||
(:c:member:`fpga_region->get_bridges`). The FPGA bridge framework supplies the
|
||||
following APIs to handle building or tearing down that list.
|
||||
|
||||
* :c:func:`fpga_bridge_get_to_list` — Get a ref of an FPGA bridge, add it to a
|
||||
* fpga_bridge_get_to_list() — Get a ref of an FPGA bridge, add it to a
|
||||
list
|
||||
* :c:func:`of_fpga_bridge_get_to_list` — Get a ref of an FPGA bridge, add it to a
|
||||
* of_fpga_bridge_get_to_list() — Get a ref of an FPGA bridge, add it to a
|
||||
list, given a device node
|
||||
* :c:func:`fpga_bridges_put` — Given a list of bridges, put them
|
||||
* fpga_bridges_put() — Given a list of bridges, put them
|
||||
|
||||
.. kernel-doc:: include/linux/fpga/fpga-region.h
|
||||
:functions: fpga_region
|
||||
|
|
|
|||
|
|
@ -11,10 +11,10 @@ Industrial I/O Devices
|
|||
----------------------
|
||||
|
||||
* struct :c:type:`iio_dev` - industrial I/O device
|
||||
* :c:func:`iio_device_alloc()` - allocate an :c:type:`iio_dev` from a driver
|
||||
* :c:func:`iio_device_free()` - free an :c:type:`iio_dev` from a driver
|
||||
* :c:func:`iio_device_register()` - register a device with the IIO subsystem
|
||||
* :c:func:`iio_device_unregister()` - unregister a device from the IIO
|
||||
* iio_device_alloc() - allocate an :c:type:`iio_dev` from a driver
|
||||
* iio_device_free() - free an :c:type:`iio_dev` from a driver
|
||||
* iio_device_register() - register a device with the IIO subsystem
|
||||
* iio_device_unregister() - unregister a device from the IIO
|
||||
subsystem
|
||||
|
||||
An IIO device usually corresponds to a single hardware sensor and it
|
||||
|
|
@ -34,17 +34,17 @@ A typical IIO driver will register itself as an :doc:`I2C <../i2c>` or
|
|||
|
||||
At probe:
|
||||
|
||||
1. Call :c:func:`iio_device_alloc()`, which allocates memory for an IIO device.
|
||||
1. Call iio_device_alloc(), which allocates memory for an IIO device.
|
||||
2. Initialize IIO device fields with driver specific information (e.g.
|
||||
device name, device channels).
|
||||
3. Call :c:func:`iio_device_register()`, this registers the device with the
|
||||
3. Call iio_device_register(), this registers the device with the
|
||||
IIO core. After this call the device is ready to accept requests from user
|
||||
space applications.
|
||||
|
||||
At remove, we free the resources allocated in probe in reverse order:
|
||||
|
||||
1. :c:func:`iio_device_unregister()`, unregister the device from the IIO core.
|
||||
2. :c:func:`iio_device_free()`, free the memory allocated for the IIO device.
|
||||
1. iio_device_unregister(), unregister the device from the IIO core.
|
||||
2. iio_device_free(), free the memory allocated for the IIO device.
|
||||
|
||||
IIO device sysfs interface
|
||||
==========================
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@ NVMe Fault Injection
|
|||
Linux's fault injection framework provides a systematic way to support
|
||||
error injection via debugfs in the /sys/kernel/debug directory. When
|
||||
enabled, the default NVME_SC_INVALID_OPCODE with no retry will be
|
||||
injected into the nvme_end_request. Users can change the default status
|
||||
injected into the nvme_try_complete_req. Users can change the default status
|
||||
code and no retry flag via the debugfs. The list of Generic Command
|
||||
Status can be found in include/linux/nvme.h
|
||||
|
||||
|
|
|
|||
|
|
@ -110,13 +110,15 @@ The Amiga protection flags RWEDRWEDHSPARWED are handled as follows:
|
|||
|
||||
- R maps to r for user, group and others. On directories, R implies x.
|
||||
|
||||
- If both W and D are allowed, w will be set.
|
||||
- W maps to w.
|
||||
|
||||
- E maps to x.
|
||||
|
||||
- H and P are always retained and ignored under Linux.
|
||||
- D is ignored.
|
||||
|
||||
- A is always reset when a file is written to.
|
||||
- H, S and P are always retained and ignored under Linux.
|
||||
|
||||
- A is cleared when a file is written to.
|
||||
|
||||
User id and group id will be used unless set[gu]id are given as mount
|
||||
options. Since most of the Amiga file systems are single user systems
|
||||
|
|
@ -128,11 +130,13 @@ Linux -> Amiga:
|
|||
|
||||
The Linux rwxrwxrwx file mode is handled as follows:
|
||||
|
||||
- r permission will set R for user, group and others.
|
||||
- r permission will allow R for user, group and others.
|
||||
|
||||
- w permission will set W and D for user, group and others.
|
||||
- w permission will allow W for user, group and others.
|
||||
|
||||
- x permission of the user will set E for plain files.
|
||||
- x permission of the user will allow E for plain files.
|
||||
|
||||
- D will be allowed for user, group and others.
|
||||
|
||||
- All other flags (suid, sgid, ...) are ignored and will
|
||||
not be retained.
|
||||
|
|
|
|||
|
|
@ -39,6 +39,6 @@ entry.
|
|||
Other References
|
||||
----------------
|
||||
|
||||
Also see http://www.nongnu.org/ext2-doc/ for quite a collection of
|
||||
Also see https://www.nongnu.org/ext2-doc/ for quite a collection of
|
||||
information about ext2/3. Here's another old reference:
|
||||
http://wiki.osdev.org/Ext2
|
||||
|
|
|
|||
|
|
@ -68,7 +68,7 @@ See below for all known bank addresses, numbers of sensors in that bank,
|
|||
number of bytes data per sensor and contents/meaning of those bytes.
|
||||
|
||||
Although both this document and the kernel driver have kept the sensor
|
||||
terminoligy for the addressing within a bank this is not 100% correct, in
|
||||
terminology for the addressing within a bank this is not 100% correct, in
|
||||
bank 0x24 for example the addressing within the bank selects a PWM output not
|
||||
a sensor.
|
||||
|
||||
|
|
@ -155,7 +155,7 @@ After wider testing of the Linux kernel driver some variants of the uGuru have
|
|||
turned up which do not hold 0x08 at DATA within 250 reads after writing the
|
||||
bank address. With these versions this happens quite frequent, using larger
|
||||
timeouts doesn't help, they just go offline for a second or 2, doing some
|
||||
internal callibration or whatever. Your code should be prepared to handle
|
||||
internal calibration or whatever. Your code should be prepared to handle
|
||||
this and in case of no response in this specific case just goto sleep for a
|
||||
while and then retry.
|
||||
|
||||
|
|
@ -331,6 +331,6 @@ the voltage / clock programming out, I tried reading and only reading banks
|
|||
0-0x30 with the reading code used for the sensor banks (0x20-0x28) and this
|
||||
resulted in a _permanent_ reprogramming of the voltages, luckily I had the
|
||||
sensors part configured so that it would shutdown my system on any out of spec
|
||||
voltages which proprably safed my computer (after a reboot I managed to
|
||||
voltages which probably safed my computer (after a reboot I managed to
|
||||
immediately enter the bios and reload the defaults). This probably means that
|
||||
the read/write cycle for the non sensor part is different from the sensor part.
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@ Supported chips:
|
|||
Note:
|
||||
The uGuru is a microcontroller with onboard firmware which programs
|
||||
it to behave as a hwmon IC. There are many different revisions of the
|
||||
firmware and thus effectivly many different revisions of the uGuru.
|
||||
firmware and thus effectively many different revisions of the uGuru.
|
||||
Below is an incomplete list with which revisions are used for which
|
||||
Motherboards:
|
||||
|
||||
|
|
@ -33,7 +33,7 @@ Supported chips:
|
|||
sensortype (Volt or Temp) for bank1 sensors, for revision 1 uGuru's
|
||||
this does not always work. For these uGuru's the autodetection can
|
||||
be overridden with the bank1_types module param. For all 3 known
|
||||
revison 1 motherboards the correct use of this param is:
|
||||
revision 1 motherboards the correct use of this param is:
|
||||
bank1_types=1,1,0,0,0,0,0,2,0,0,0,0,2,0,0,1
|
||||
You may also need to specify the fan_sensors option for these boards
|
||||
fan_sensors=5
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ Supported chips:
|
|||
Note:
|
||||
The uGuru is a microcontroller with onboard firmware which programs
|
||||
it to behave as a hwmon IC. There are many different revisions of the
|
||||
firmware and thus effectivly many different revisions of the uGuru.
|
||||
firmware and thus effectively many different revisions of the uGuru.
|
||||
Below is an incomplete list with which revisions are used for which
|
||||
Motherboards:
|
||||
|
||||
|
|
@ -24,7 +24,7 @@ Supported chips:
|
|||
- uGuru 3.0.0.0 ~ 3.0.x.x (AW8, AL8, AT8, NI8 SLI, AT8 32X, AN8 32X,
|
||||
AW9D-MAX)
|
||||
|
||||
The abituguru3 driver is only for revison 3.0.x.x motherboards,
|
||||
The abituguru3 driver is only for revision 3.0.x.x motherboards,
|
||||
this driver will not work on older motherboards. For older
|
||||
motherboards use the abituguru (without the 3 !) driver.
|
||||
|
||||
|
|
|
|||
|
|
@ -23,8 +23,8 @@ supports C and the GNU C extensions required by the kernel, and is pronounced
|
|||
Clang
|
||||
-----
|
||||
|
||||
The compiler used can be swapped out via `CC=` command line argument to `make`.
|
||||
`CC=` should be set when selecting a config and during a build.
|
||||
The compiler used can be swapped out via ``CC=`` command line argument to ``make``.
|
||||
``CC=`` should be set when selecting a config and during a build. ::
|
||||
|
||||
make CC=clang defconfig
|
||||
|
||||
|
|
@ -34,33 +34,33 @@ Cross Compiling
|
|||
---------------
|
||||
|
||||
A single Clang compiler binary will typically contain all supported backends,
|
||||
which can help simplify cross compiling.
|
||||
which can help simplify cross compiling. ::
|
||||
|
||||
ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make CC=clang
|
||||
|
||||
`CROSS_COMPILE` is not used to prefix the Clang compiler binary, instead
|
||||
`CROSS_COMPILE` is used to set a command line flag: `--target <triple>`. For
|
||||
example:
|
||||
``CROSS_COMPILE`` is not used to prefix the Clang compiler binary, instead
|
||||
``CROSS_COMPILE`` is used to set a command line flag: ``--target <triple>``. For
|
||||
example: ::
|
||||
|
||||
clang --target aarch64-linux-gnu foo.c
|
||||
|
||||
LLVM Utilities
|
||||
--------------
|
||||
|
||||
LLVM has substitutes for GNU binutils utilities. Kbuild supports `LLVM=1`
|
||||
to enable them.
|
||||
LLVM has substitutes for GNU binutils utilities. Kbuild supports ``LLVM=1``
|
||||
to enable them. ::
|
||||
|
||||
make LLVM=1
|
||||
|
||||
They can be enabled individually. The full list of the parameters:
|
||||
They can be enabled individually. The full list of the parameters: ::
|
||||
|
||||
make CC=clang LD=ld.lld AR=llvm-ar NM=llvm-nm STRIP=llvm-strip \\
|
||||
OBJCOPY=llvm-objcopy OBJDUMP=llvm-objdump OBJSIZE=llvm-size \\
|
||||
READELF=llvm-readelf HOSTCC=clang HOSTCXX=clang++ HOSTAR=llvm-ar \\
|
||||
make CC=clang LD=ld.lld AR=llvm-ar NM=llvm-nm STRIP=llvm-strip \
|
||||
OBJCOPY=llvm-objcopy OBJDUMP=llvm-objdump OBJSIZE=llvm-size \
|
||||
READELF=llvm-readelf HOSTCC=clang HOSTCXX=clang++ HOSTAR=llvm-ar \
|
||||
HOSTLD=ld.lld
|
||||
|
||||
Currently, the integrated assembler is disabled by default. You can pass
|
||||
`LLVM_IAS=1` to enable it.
|
||||
``LLVM_IAS=1`` to enable it.
|
||||
|
||||
Getting Help
|
||||
------------
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@ This document describes the Linux kernel Makefiles.
|
|||
--- 3.5 Library file goals - lib-y
|
||||
--- 3.6 Descending down in directories
|
||||
--- 3.7 Compilation flags
|
||||
--- 3.8 Command line dependency
|
||||
--- 3.8 <deleted>
|
||||
--- 3.9 Dependency tracking
|
||||
--- 3.10 Special Rules
|
||||
--- 3.11 $(CC) support functions
|
||||
|
|
@ -39,8 +39,8 @@ This document describes the Linux kernel Makefiles.
|
|||
|
||||
=== 7 Architecture Makefiles
|
||||
--- 7.1 Set variables to tweak the build to the architecture
|
||||
--- 7.2 Add prerequisites to archheaders:
|
||||
--- 7.3 Add prerequisites to archprepare:
|
||||
--- 7.2 Add prerequisites to archheaders
|
||||
--- 7.3 Add prerequisites to archprepare
|
||||
--- 7.4 List directories to visit when descending
|
||||
--- 7.5 Architecture-specific boot images
|
||||
--- 7.6 Building non-kbuild targets
|
||||
|
|
@ -129,7 +129,7 @@ The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
|
|||
be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
|
||||
file will be used.
|
||||
|
||||
Section 3.1 "Goal definitions" is a quick intro, further chapters provide
|
||||
Section 3.1 "Goal definitions" is a quick intro; further chapters provide
|
||||
more details, with real examples.
|
||||
|
||||
3.1 Goal definitions
|
||||
|
|
@ -965,7 +965,7 @@ When kbuild executes, the following steps are followed (roughly):
|
|||
KBUILD_LDFLAGS := -m elf_s390
|
||||
|
||||
Note: ldflags-y can be used to further customise
|
||||
the flags used. See chapter 3.7.
|
||||
the flags used. See section 3.7.
|
||||
|
||||
LDFLAGS_vmlinux
|
||||
Options for $(LD) when linking vmlinux
|
||||
|
|
@ -1121,7 +1121,7 @@ When kbuild executes, the following steps are followed (roughly):
|
|||
|
||||
In this example, the file target maketools will be processed
|
||||
before descending down in the subdirectories.
|
||||
See also chapter XXX-TODO that describe how kbuild supports
|
||||
See also chapter XXX-TODO that describes how kbuild supports
|
||||
generating offset header files.
|
||||
|
||||
|
||||
|
|
@ -1261,7 +1261,7 @@ When kbuild executes, the following steps are followed (roughly):
|
|||
always be built.
|
||||
Assignments to $(targets) are without $(obj)/ prefix.
|
||||
if_changed may be used in conjunction with custom commands as
|
||||
defined in 6.8 "Custom kbuild commands".
|
||||
defined in 7.8 "Custom kbuild commands".
|
||||
|
||||
Note: It is a typical mistake to forget the FORCE prerequisite.
|
||||
Another common pitfall is that whitespace is sometimes
|
||||
|
|
@ -1411,7 +1411,7 @@ When kbuild executes, the following steps are followed (roughly):
|
|||
that may be shared between individual architectures.
|
||||
The recommended approach how to use a generic header file is
|
||||
to list the file in the Kbuild file.
|
||||
See "7.2 generic-y" for further info on syntax etc.
|
||||
See "8.2 generic-y" for further info on syntax etc.
|
||||
|
||||
7.11 Post-link pass
|
||||
-------------------
|
||||
|
|
@ -1601,4 +1601,4 @@ is the right choice.
|
|||
|
||||
- Describe how kbuild supports shipped files with _shipped.
|
||||
- Generating offset header files.
|
||||
- Add more variables to section 7?
|
||||
- Add more variables to chapters 7 or 9?
|
||||
|
|
|
|||
|
|
@ -164,14 +164,14 @@ by disabling preemption or interrupts.
|
|||
On non-PREEMPT_RT kernels local_lock operations map to the preemption and
|
||||
interrupt disabling and enabling primitives:
|
||||
|
||||
=========================== ======================
|
||||
local_lock(&llock) preempt_disable()
|
||||
local_unlock(&llock) preempt_enable()
|
||||
local_lock_irq(&llock) local_irq_disable()
|
||||
local_unlock_irq(&llock) local_irq_enable()
|
||||
local_lock_save(&llock) local_irq_save()
|
||||
local_lock_restore(&llock) local_irq_save()
|
||||
=========================== ======================
|
||||
=============================== ======================
|
||||
local_lock(&llock) preempt_disable()
|
||||
local_unlock(&llock) preempt_enable()
|
||||
local_lock_irq(&llock) local_irq_disable()
|
||||
local_unlock_irq(&llock) local_irq_enable()
|
||||
local_lock_irqsave(&llock) local_irq_save()
|
||||
local_unlock_irqrestore(&llock) local_irq_restore()
|
||||
=============================== ======================
|
||||
|
||||
The named scope of local_lock has two advantages over the regular
|
||||
primitives:
|
||||
|
|
@ -353,14 +353,14 @@ protection scope. So the following substitution is wrong::
|
|||
{
|
||||
local_irq_save(flags); -> local_lock_irqsave(&local_lock_1, flags);
|
||||
func3();
|
||||
local_irq_restore(flags); -> local_lock_irqrestore(&local_lock_1, flags);
|
||||
local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock_1, flags);
|
||||
}
|
||||
|
||||
func2()
|
||||
{
|
||||
local_irq_save(flags); -> local_lock_irqsave(&local_lock_2, flags);
|
||||
func3();
|
||||
local_irq_restore(flags); -> local_lock_irqrestore(&local_lock_2, flags);
|
||||
local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock_2, flags);
|
||||
}
|
||||
|
||||
func3()
|
||||
|
|
@ -379,14 +379,14 @@ PREEMPT_RT-specific semantics of spinlock_t. The correct substitution is::
|
|||
{
|
||||
local_irq_save(flags); -> local_lock_irqsave(&local_lock, flags);
|
||||
func3();
|
||||
local_irq_restore(flags); -> local_lock_irqrestore(&local_lock, flags);
|
||||
local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock, flags);
|
||||
}
|
||||
|
||||
func2()
|
||||
{
|
||||
local_irq_save(flags); -> local_lock_irqsave(&local_lock, flags);
|
||||
func3();
|
||||
local_irq_restore(flags); -> local_lock_irqrestore(&local_lock, flags);
|
||||
local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock, flags);
|
||||
}
|
||||
|
||||
func3()
|
||||
|
|
|
|||
|
|
@ -101,3 +101,4 @@ to do something different in the near future.
|
|||
|
||||
../doc-guide/maintainer-profile
|
||||
../nvdimm/maintainer-entry-profile
|
||||
../riscv/patch-acceptance
|
||||
|
|
|
|||
|
|
@ -2860,17 +2860,6 @@ version of the linux kernel, found on http://kernel.org
|
|||
The latest version of this document can be found in the latest kernel
|
||||
source (named Documentation/networking/bonding.rst).
|
||||
|
||||
Discussions regarding the usage of the bonding driver take place on the
|
||||
bonding-devel mailing list, hosted at sourceforge.net. If you have questions or
|
||||
problems, post them to the list. The list address is:
|
||||
|
||||
bonding-devel@lists.sourceforge.net
|
||||
|
||||
The administrative interface (to subscribe or unsubscribe) can
|
||||
be found at:
|
||||
|
||||
https://lists.sourceforge.net/lists/listinfo/bonding-devel
|
||||
|
||||
Discussions regarding the development of the bonding driver take place
|
||||
on the main Linux network mailing list, hosted at vger.kernel.org. The list
|
||||
address is:
|
||||
|
|
@ -2881,10 +2870,3 @@ The administrative interface (to subscribe or unsubscribe) can
|
|||
be found at:
|
||||
|
||||
http://vger.kernel.org/vger-lists.html#netdev
|
||||
|
||||
Donald Becker's Ethernet Drivers and diag programs may be found at :
|
||||
|
||||
- http://web.archive.org/web/%2E/http://www.scyld.com/network/
|
||||
|
||||
You will also find a lot of information regarding Ethernet, NWay, MII,
|
||||
etc. at www.scyld.com.
|
||||
|
|
|
|||
|
|
@ -180,7 +180,7 @@ The configuration can only be set up via VLAN tagging and bridge setup.
|
|||
|
||||
# bring up the slave interfaces
|
||||
ip link set lan1 up
|
||||
ip link set lan1 up
|
||||
ip link set lan2 up
|
||||
ip link set lan3 up
|
||||
|
||||
# create bridge
|
||||
|
|
|
|||
|
|
@ -49,16 +49,18 @@ Register preservation rules
|
|||
Register preservation rules match the ELF ABI calling sequence with the
|
||||
following differences:
|
||||
|
||||
=========== ============= ========================================
|
||||
--- For the sc instruction, differences with the ELF ABI ---
|
||||
=========== ============= ========================================
|
||||
r0 Volatile (System call number.)
|
||||
r3 Volatile (Parameter 1, and return value.)
|
||||
r4-r8 Volatile (Parameters 2-6.)
|
||||
cr0 Volatile (cr0.SO is the return error condition.)
|
||||
cr1, cr5-7 Nonvolatile
|
||||
lr Nonvolatile
|
||||
=========== ============= ========================================
|
||||
|
||||
--- For the scv 0 instruction, differences with the ELF ABI ---
|
||||
=========== ============= ========================================
|
||||
r0 Volatile (System call number.)
|
||||
r3 Volatile (Parameter 1, and return value.)
|
||||
r4-r8 Volatile (Parameters 2-6.)
|
||||
|
|
|
|||
|
|
@ -142,7 +142,7 @@ only NUL-terminated strings. The safe replacement is strscpy().
|
|||
(Users of strscpy() still needing NUL-padding should instead
|
||||
use strscpy_pad().)
|
||||
|
||||
If a caller is using non-NUL-terminated strings, strncpy()() can
|
||||
If a caller is using non-NUL-terminated strings, strncpy() can
|
||||
still be used, but destinations should be marked with the `__nonstring
|
||||
<https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html>`_
|
||||
attribute to avoid future compiler warnings.
|
||||
|
|
|
|||
|
|
@ -332,7 +332,7 @@ WO 9901953 (A1)
|
|||
|
||||
|
||||
US Patents (https://www.uspto.gov/)
|
||||
----------------------------------
|
||||
-----------------------------------
|
||||
|
||||
US 5925841
|
||||
Digital Sampling Instrument employing cache memory (Jul. 20, 1999)
|
||||
|
|
|
|||
|
|
@ -337,7 +337,7 @@ WO 9901953 (A1)
|
|||
|
||||
|
||||
US Patents (https://www.uspto.gov/)
|
||||
----------------------------------
|
||||
-----------------------------------
|
||||
|
||||
US 5925841
|
||||
Digital Sampling Instrument employing cache memory (Jul. 20, 1999)
|
||||
|
|
|
|||
|
|
@ -143,7 +143,7 @@ timestamp shows when the information is put together by the driver
|
|||
before returning from the ``STATUS`` and ``STATUS_EXT`` ioctl. in most cases
|
||||
this driver_timestamp will be identical to the regular system tstamp.
|
||||
|
||||
Examples of typestamping with HDaudio:
|
||||
Examples of timestamping with HDAudio:
|
||||
|
||||
1. DMA timestamp, no compensation for DMA+analog delay
|
||||
::
|
||||
|
|
|
|||
|
|
@ -130,7 +130,7 @@ chi usa solo stringe terminate. La versione sicura da usare è
|
|||
strscpy(). (chi usa strscpy() e necessita di estendere la
|
||||
terminazione con NUL deve aggiungere una chiamata a memset())
|
||||
|
||||
Se il chiamate no usa stringhe terminate con NUL, allore strncpy()()
|
||||
Se il chiamate no usa stringhe terminate con NUL, allore strncpy()
|
||||
può continuare ad essere usata, ma i buffer di destinazione devono essere
|
||||
marchiati con l'attributo `__nonstring <https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html>`_
|
||||
per evitare avvisi durante la compilazione.
|
||||
|
|
|
|||
137
MAINTAINERS
137
MAINTAINERS
|
|
@ -1525,6 +1525,7 @@ F: Documentation/devicetree/bindings/arm/actions.yaml
|
|||
F: Documentation/devicetree/bindings/clock/actions,owl-cmu.txt
|
||||
F: Documentation/devicetree/bindings/dma/owl-dma.txt
|
||||
F: Documentation/devicetree/bindings/i2c/i2c-owl.txt
|
||||
F: Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml
|
||||
F: Documentation/devicetree/bindings/mmc/owl-mmc.yaml
|
||||
F: Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt
|
||||
F: Documentation/devicetree/bindings/power/actions,owl-sps.txt
|
||||
|
|
@ -1536,6 +1537,7 @@ F: drivers/clk/actions/
|
|||
F: drivers/clocksource/timer-owl*
|
||||
F: drivers/dma/owl-dma.c
|
||||
F: drivers/i2c/busses/i2c-owl.c
|
||||
F: drivers/irqchip/irq-owl-sirq.c
|
||||
F: drivers/mmc/host/owl-mmc.c
|
||||
F: drivers/pinctrl/actions/*
|
||||
F: drivers/soc/actions/
|
||||
|
|
@ -1694,7 +1696,6 @@ F: arch/arm/mach-cns3xxx/
|
|||
|
||||
ARM/CAVIUM THUNDER NETWORK DRIVER
|
||||
M: Sunil Goutham <sgoutham@marvell.com>
|
||||
M: Robert Richter <rrichter@marvell.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: drivers/net/ethernet/cavium/thunder/
|
||||
|
|
@ -3205,6 +3206,7 @@ S: Maintained
|
|||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
|
||||
F: block/
|
||||
F: drivers/block/
|
||||
F: include/linux/blk*
|
||||
F: kernel/trace/blktrace.c
|
||||
F: lib/sbitmap.c
|
||||
|
||||
|
|
@ -3388,6 +3390,7 @@ M: Florian Fainelli <f.fainelli@gmail.com>
|
|||
L: netdev@vger.kernel.org
|
||||
L: openwrt-devel@lists.openwrt.org (subscribers-only)
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/net/dsa/b53.txt
|
||||
F: drivers/net/dsa/b53/*
|
||||
F: include/linux/platform_data/b53.h
|
||||
|
||||
|
|
@ -3573,13 +3576,28 @@ L: bcm-kernel-feedback-list@broadcom.com
|
|||
S: Maintained
|
||||
F: drivers/phy/broadcom/phy-brcm-usb*
|
||||
|
||||
BROADCOM ETHERNET PHY DRIVERS
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: bcm-kernel-feedback-list@broadcom.com
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/net/broadcom-bcm87xx.txt
|
||||
F: drivers/net/phy/bcm*.[ch]
|
||||
F: drivers/net/phy/broadcom.c
|
||||
F: include/linux/brcmphy.h
|
||||
|
||||
BROADCOM GENET ETHERNET DRIVER
|
||||
M: Doug Berger <opendmb@gmail.com>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: bcm-kernel-feedback-list@broadcom.com
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/net/brcm,bcmgenet.txt
|
||||
F: Documentation/devicetree/bindings/net/brcm,unimac-mdio.txt
|
||||
F: drivers/net/ethernet/broadcom/genet/
|
||||
F: drivers/net/mdio/mdio-bcm-unimac.c
|
||||
F: include/linux/platform_data/bcmgenet.h
|
||||
F: include/linux/platform_data/mdio-bcm-unimac.h
|
||||
|
||||
BROADCOM IPROC ARM ARCHITECTURE
|
||||
M: Ray Jui <rjui@broadcom.com>
|
||||
|
|
@ -3931,8 +3949,8 @@ W: https://wireless.wiki.kernel.org/en/users/Drivers/carl9170
|
|||
F: drivers/net/wireless/ath/carl9170/
|
||||
|
||||
CAVIUM I2C DRIVER
|
||||
M: Robert Richter <rrichter@marvell.com>
|
||||
S: Supported
|
||||
M: Robert Richter <rric@kernel.org>
|
||||
S: Odd Fixes
|
||||
W: http://www.marvell.com
|
||||
F: drivers/i2c/busses/i2c-octeon*
|
||||
F: drivers/i2c/busses/i2c-thunderx*
|
||||
|
|
@ -3947,8 +3965,8 @@ W: http://www.marvell.com
|
|||
F: drivers/net/ethernet/cavium/liquidio/
|
||||
|
||||
CAVIUM MMC DRIVER
|
||||
M: Robert Richter <rrichter@marvell.com>
|
||||
S: Supported
|
||||
M: Robert Richter <rric@kernel.org>
|
||||
S: Odd Fixes
|
||||
W: http://www.marvell.com
|
||||
F: drivers/mmc/host/cavium*
|
||||
|
||||
|
|
@ -3960,9 +3978,9 @@ W: http://www.marvell.com
|
|||
F: drivers/crypto/cavium/cpt/
|
||||
|
||||
CAVIUM THUNDERX2 ARM64 SOC
|
||||
M: Robert Richter <rrichter@marvell.com>
|
||||
M: Robert Richter <rric@kernel.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
S: Odd Fixes
|
||||
F: Documentation/devicetree/bindings/arm/cavium-thunder2.txt
|
||||
F: arch/arm64/boot/dts/cavium/thunder2-99xx*
|
||||
|
||||
|
|
@ -4241,6 +4259,8 @@ S: Maintained
|
|||
F: .clang-format
|
||||
|
||||
CLANG/LLVM BUILD SUPPORT
|
||||
M: Nathan Chancellor <natechancellor@gmail.com>
|
||||
M: Nick Desaulniers <ndesaulniers@google.com>
|
||||
L: clang-built-linux@googlegroups.com
|
||||
S: Supported
|
||||
W: https://clangbuiltlinux.github.io/
|
||||
|
|
@ -5050,7 +5070,7 @@ F: include/linux/dm-*.h
|
|||
F: include/uapi/linux/dm-*.h
|
||||
|
||||
DEVLINK
|
||||
M: Jiri Pirko <jiri@mellanox.com>
|
||||
M: Jiri Pirko <jiri@nvidia.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/networking/devlink
|
||||
|
|
@ -5239,6 +5259,7 @@ DOCUMENTATION
|
|||
M: Jonathan Corbet <corbet@lwn.net>
|
||||
L: linux-doc@vger.kernel.org
|
||||
S: Maintained
|
||||
P: Documentation/doc-guide/maintainer-profile.rst
|
||||
T: git git://git.lwn.net/linux.git docs-next
|
||||
F: Documentation/
|
||||
F: scripts/documentation-file-ref-check
|
||||
|
|
@ -6081,7 +6102,7 @@ F: include/linux/dynamic_debug.h
|
|||
F: lib/dynamic_debug.c
|
||||
|
||||
DYNAMIC INTERRUPT MODERATION
|
||||
M: Tal Gilboa <talgi@mellanox.com>
|
||||
M: Tal Gilboa <talgi@nvidia.com>
|
||||
S: Maintained
|
||||
F: Documentation/networking/net_dim.rst
|
||||
F: include/linux/dim.h
|
||||
|
|
@ -6161,7 +6182,7 @@ F: Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt
|
|||
F: drivers/edac/aspeed_edac.c
|
||||
|
||||
EDAC-BLUEFIELD
|
||||
M: Shravan Kumar Ramani <sramani@mellanox.com>
|
||||
M: Shravan Kumar Ramani <sramani@nvidia.com>
|
||||
S: Supported
|
||||
F: drivers/edac/bluefield_edac.c
|
||||
|
||||
|
|
@ -6173,16 +6194,15 @@ F: drivers/edac/highbank*
|
|||
|
||||
EDAC-CAVIUM OCTEON
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
M: Robert Richter <rrichter@marvell.com>
|
||||
L: linux-edac@vger.kernel.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/edac/octeon_edac*
|
||||
|
||||
EDAC-CAVIUM THUNDERX
|
||||
M: Robert Richter <rrichter@marvell.com>
|
||||
M: Robert Richter <rric@kernel.org>
|
||||
L: linux-edac@vger.kernel.org
|
||||
S: Supported
|
||||
S: Odd Fixes
|
||||
F: drivers/edac/thunderx_edac*
|
||||
|
||||
EDAC-CORE
|
||||
|
|
@ -6190,7 +6210,7 @@ M: Borislav Petkov <bp@alien8.de>
|
|||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
M: Tony Luck <tony.luck@intel.com>
|
||||
R: James Morse <james.morse@arm.com>
|
||||
R: Robert Richter <rrichter@marvell.com>
|
||||
R: Robert Richter <rric@kernel.org>
|
||||
L: linux-edac@vger.kernel.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git edac-for-next
|
||||
|
|
@ -6483,8 +6503,8 @@ S: Odd Fixes
|
|||
F: drivers/net/ethernet/agere/
|
||||
|
||||
ETHERNET BRIDGE
|
||||
M: Roopa Prabhu <roopa@cumulusnetworks.com>
|
||||
M: Nikolay Aleksandrov <nikolay@cumulusnetworks.com>
|
||||
M: Roopa Prabhu <roopa@nvidia.com>
|
||||
M: Nikolay Aleksandrov <nikolay@nvidia.com>
|
||||
L: bridge@lists.linux-foundation.org (moderated for non-subscribers)
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -6494,7 +6514,6 @@ F: net/bridge/
|
|||
|
||||
ETHERNET PHY LIBRARY
|
||||
M: Andrew Lunn <andrew@lunn.ch>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
M: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
R: Russell King <linux@armlinux.org.uk>
|
||||
L: netdev@vger.kernel.org
|
||||
|
|
@ -6599,7 +6618,7 @@ F: drivers/iommu/exynos-iommu.c
|
|||
|
||||
EZchip NPS platform support
|
||||
M: Vineet Gupta <vgupta@synopsys.com>
|
||||
M: Ofer Levi <oferle@mellanox.com>
|
||||
M: Ofer Levi <oferle@nvidia.com>
|
||||
S: Supported
|
||||
F: arch/arc/boot/dts/eznps.dts
|
||||
F: arch/arc/plat-eznps
|
||||
|
|
@ -8255,7 +8274,7 @@ IA64 (Itanium) PLATFORM
|
|||
M: Tony Luck <tony.luck@intel.com>
|
||||
M: Fenghua Yu <fenghua.yu@intel.com>
|
||||
L: linux-ia64@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Odd Fixes
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux.git
|
||||
F: Documentation/ia64/
|
||||
F: arch/ia64/
|
||||
|
|
@ -8563,7 +8582,7 @@ F: drivers/iio/pressure/dps310.c
|
|||
|
||||
INFINIBAND SUBSYSTEM
|
||||
M: Doug Ledford <dledford@redhat.com>
|
||||
M: Jason Gunthorpe <jgg@mellanox.com>
|
||||
M: Jason Gunthorpe <jgg@nvidia.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Supported
|
||||
W: https://github.com/linux-rdma/rdma-core
|
||||
|
|
@ -9226,7 +9245,7 @@ F: drivers/firmware/iscsi_ibft*
|
|||
|
||||
ISCSI EXTENSIONS FOR RDMA (ISER) INITIATOR
|
||||
M: Sagi Grimberg <sagi@grimberg.me>
|
||||
M: Max Gurtovoy <maxg@mellanox.com>
|
||||
M: Max Gurtovoy <maxg@nvidia.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.openfabrics.org
|
||||
|
|
@ -11072,7 +11091,7 @@ F: Documentation/devicetree/bindings/input/touchscreen/melfas_mip4.txt
|
|||
F: drivers/input/touchscreen/melfas_mip4.c
|
||||
|
||||
MELLANOX ETHERNET DRIVER (mlx4_en)
|
||||
M: Tariq Toukan <tariqt@mellanox.com>
|
||||
M: Tariq Toukan <tariqt@nvidia.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
|
|
@ -11080,7 +11099,7 @@ Q: http://patchwork.ozlabs.org/project/netdev/list/
|
|||
F: drivers/net/ethernet/mellanox/mlx4/en_*
|
||||
|
||||
MELLANOX ETHERNET DRIVER (mlx5e)
|
||||
M: Saeed Mahameed <saeedm@mellanox.com>
|
||||
M: Saeed Mahameed <saeedm@nvidia.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
|
|
@ -11088,7 +11107,7 @@ Q: http://patchwork.ozlabs.org/project/netdev/list/
|
|||
F: drivers/net/ethernet/mellanox/mlx5/core/en_*
|
||||
|
||||
MELLANOX ETHERNET INNOVA DRIVERS
|
||||
R: Boris Pismenny <borisp@mellanox.com>
|
||||
R: Boris Pismenny <borisp@nvidia.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
|
|
@ -11099,8 +11118,8 @@ F: drivers/net/ethernet/mellanox/mlx5/core/fpga/*
|
|||
F: include/linux/mlx5/mlx5_ifc_fpga.h
|
||||
|
||||
MELLANOX ETHERNET SWITCH DRIVERS
|
||||
M: Jiri Pirko <jiri@mellanox.com>
|
||||
M: Ido Schimmel <idosch@mellanox.com>
|
||||
M: Jiri Pirko <jiri@nvidia.com>
|
||||
M: Ido Schimmel <idosch@nvidia.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
|
|
@ -11109,7 +11128,7 @@ F: drivers/net/ethernet/mellanox/mlxsw/
|
|||
F: tools/testing/selftests/drivers/net/mlxsw/
|
||||
|
||||
MELLANOX FIRMWARE FLASH LIBRARY (mlxfw)
|
||||
M: mlxsw@mellanox.com
|
||||
M: mlxsw@nvidia.com
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
|
|
@ -11119,7 +11138,7 @@ F: drivers/net/ethernet/mellanox/mlxfw/
|
|||
MELLANOX HARDWARE PLATFORM SUPPORT
|
||||
M: Andy Shevchenko <andy@infradead.org>
|
||||
M: Darren Hart <dvhart@infradead.org>
|
||||
M: Vadim Pasternak <vadimp@mellanox.com>
|
||||
M: Vadim Pasternak <vadimp@nvidia.com>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/ABI/testing/sysfs-platform-mellanox-bootctl
|
||||
|
|
@ -11127,7 +11146,7 @@ F: drivers/platform/mellanox/
|
|||
F: include/linux/platform_data/mlxreg.h
|
||||
|
||||
MELLANOX MLX4 core VPI driver
|
||||
M: Tariq Toukan <tariqt@mellanox.com>
|
||||
M: Tariq Toukan <tariqt@nvidia.com>
|
||||
L: netdev@vger.kernel.org
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Supported
|
||||
|
|
@ -11137,7 +11156,7 @@ F: drivers/net/ethernet/mellanox/mlx4/
|
|||
F: include/linux/mlx4/
|
||||
|
||||
MELLANOX MLX4 IB driver
|
||||
M: Yishai Hadas <yishaih@mellanox.com>
|
||||
M: Yishai Hadas <yishaih@nvidia.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
|
|
@ -11147,8 +11166,8 @@ F: include/linux/mlx4/
|
|||
F: include/uapi/rdma/mlx4-abi.h
|
||||
|
||||
MELLANOX MLX5 core VPI driver
|
||||
M: Saeed Mahameed <saeedm@mellanox.com>
|
||||
M: Leon Romanovsky <leonro@mellanox.com>
|
||||
M: Saeed Mahameed <saeedm@nvidia.com>
|
||||
M: Leon Romanovsky <leonro@nvidia.com>
|
||||
L: netdev@vger.kernel.org
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Supported
|
||||
|
|
@ -11159,7 +11178,7 @@ F: drivers/net/ethernet/mellanox/mlx5/core/
|
|||
F: include/linux/mlx5/
|
||||
|
||||
MELLANOX MLX5 IB driver
|
||||
M: Leon Romanovsky <leonro@mellanox.com>
|
||||
M: Leon Romanovsky <leonro@nvidia.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
|
|
@ -11169,8 +11188,8 @@ F: include/linux/mlx5/
|
|||
F: include/uapi/rdma/mlx5-abi.h
|
||||
|
||||
MELLANOX MLXCPLD I2C AND MUX DRIVER
|
||||
M: Vadim Pasternak <vadimp@mellanox.com>
|
||||
M: Michael Shych <michaelsh@mellanox.com>
|
||||
M: Vadim Pasternak <vadimp@nvidia.com>
|
||||
M: Michael Shych <michaelsh@nvidia.com>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/i2c/busses/i2c-mlxcpld.rst
|
||||
|
|
@ -11178,7 +11197,7 @@ F: drivers/i2c/busses/i2c-mlxcpld.c
|
|||
F: drivers/i2c/muxes/i2c-mux-mlxcpld.c
|
||||
|
||||
MELLANOX MLXCPLD LED DRIVER
|
||||
M: Vadim Pasternak <vadimp@mellanox.com>
|
||||
M: Vadim Pasternak <vadimp@nvidia.com>
|
||||
L: linux-leds@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/leds/leds-mlxcpld.rst
|
||||
|
|
@ -11186,7 +11205,7 @@ F: drivers/leds/leds-mlxcpld.c
|
|||
F: drivers/leds/leds-mlxreg.c
|
||||
|
||||
MELLANOX PLATFORM DRIVER
|
||||
M: Vadim Pasternak <vadimp@mellanox.com>
|
||||
M: Vadim Pasternak <vadimp@nvidia.com>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/platform/x86/mlx-platform.c
|
||||
|
|
@ -11754,6 +11773,13 @@ Q: http://patchwork.linuxtv.org/project/linux-media/list/
|
|||
T: git git://linuxtv.org/anttip/media_tree.git
|
||||
F: drivers/media/usb/msi2500/
|
||||
|
||||
MSTAR INTERRUPT CONTROLLER DRIVER
|
||||
M: Mark-PK Tsai <mark-pk.tsai@mediatek.com>
|
||||
M: Daniel Palmer <daniel@thingy.jp>
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/interrupt-controller/mstar,mst-intc.yaml
|
||||
F: drivers/irqchip/irq-mst-intc.c
|
||||
|
||||
MSYSTEMS DISKONCHIP G3 MTD DRIVER
|
||||
M: Robert Jarzmik <robert.jarzmik@free.fr>
|
||||
L: linux-mtd@lists.infradead.org
|
||||
|
|
@ -12167,8 +12193,8 @@ F: net/ipv6/syncookies.c
|
|||
F: net/ipv6/tcp*.c
|
||||
|
||||
NETWORKING [TLS]
|
||||
M: Boris Pismenny <borisp@mellanox.com>
|
||||
M: Aviad Yehezkel <aviadye@mellanox.com>
|
||||
M: Boris Pismenny <borisp@nvidia.com>
|
||||
M: Aviad Yehezkel <aviadye@nvidia.com>
|
||||
M: John Fastabend <john.fastabend@gmail.com>
|
||||
M: Daniel Borkmann <daniel@iogearbox.net>
|
||||
M: Jakub Kicinski <kuba@kernel.org>
|
||||
|
|
@ -12468,7 +12494,7 @@ S: Supported
|
|||
F: drivers/nfc/nxp-nci
|
||||
|
||||
OBJAGG
|
||||
M: Jiri Pirko <jiri@mellanox.com>
|
||||
M: Jiri Pirko <jiri@nvidia.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: include/linux/objagg.h
|
||||
|
|
@ -13110,7 +13136,7 @@ F: drivers/video/logo/logo_parisc*
|
|||
F: include/linux/hp_sdc.h
|
||||
|
||||
PARMAN
|
||||
M: Jiri Pirko <jiri@mellanox.com>
|
||||
M: Jiri Pirko <jiri@nvidia.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: include/linux/parman.h
|
||||
|
|
@ -13429,10 +13455,10 @@ F: Documentation/devicetree/bindings/pci/axis,artpec*
|
|||
F: drivers/pci/controller/dwc/*artpec*
|
||||
|
||||
PCIE DRIVER FOR CAVIUM THUNDERX
|
||||
M: Robert Richter <rrichter@marvell.com>
|
||||
M: Robert Richter <rric@kernel.org>
|
||||
L: linux-pci@vger.kernel.org
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
S: Odd Fixes
|
||||
F: drivers/pci/controller/pci-thunder-*
|
||||
|
||||
PCIE DRIVER FOR HISILICON
|
||||
|
|
@ -13569,12 +13595,18 @@ F: kernel/events/*
|
|||
F: tools/lib/perf/
|
||||
F: tools/perf/
|
||||
|
||||
PERFORMANCE EVENTS SUBSYSTEM ARM64 PMU EVENTS
|
||||
PERFORMANCE EVENTS TOOLING ARM64
|
||||
R: John Garry <john.garry@huawei.com>
|
||||
R: Will Deacon <will@kernel.org>
|
||||
R: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
R: Leo Yan <leo.yan@linaro.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: tools/build/feature/test-libopencsd.c
|
||||
F: tools/perf/arch/arm*/
|
||||
F: tools/perf/pmu-events/arch/arm64/
|
||||
F: tools/perf/util/arm-spe*
|
||||
F: tools/perf/util/cs-etm*
|
||||
|
||||
PERSONALITY HANDLING
|
||||
M: Christoph Hellwig <hch@infradead.org>
|
||||
|
|
@ -14365,7 +14397,7 @@ M: Rob Clark <robdclark@gmail.com>
|
|||
L: iommu@lists.linux-foundation.org
|
||||
L: linux-arm-msm@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/iommu/qcom_iommu.c
|
||||
F: drivers/iommu/arm/arm-smmu/qcom_iommu.c
|
||||
|
||||
QUALCOMM IPCC MAILBOX DRIVER
|
||||
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
|
|
@ -16034,7 +16066,7 @@ F: drivers/infiniband/sw/siw/
|
|||
F: include/uapi/rdma/siw-abi.h
|
||||
|
||||
SOFT-ROCE DRIVER (rxe)
|
||||
M: Zhu Yanjun <yanjunz@mellanox.com>
|
||||
M: Zhu Yanjun <yanjunz@nvidia.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/infiniband/sw/rxe/
|
||||
|
|
@ -17214,8 +17246,8 @@ S: Maintained
|
|||
F: drivers/net/thunderbolt.c
|
||||
|
||||
THUNDERX GPIO DRIVER
|
||||
M: Robert Richter <rrichter@marvell.com>
|
||||
S: Maintained
|
||||
M: Robert Richter <rric@kernel.org>
|
||||
S: Odd Fixes
|
||||
F: drivers/gpio/gpio-thunderx.c
|
||||
|
||||
TI AM437X VPFE DRIVER
|
||||
|
|
@ -18874,6 +18906,15 @@ S: Maintained
|
|||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/core
|
||||
F: arch/x86/platform
|
||||
|
||||
X86 PLATFORM UV HPE SUPERDOME FLEX
|
||||
M: Steve Wahl <steve.wahl@hpe.com>
|
||||
R: Dimitri Sivanich <dimitri.sivanich@hpe.com>
|
||||
R: Russ Anderson <russ.anderson@hpe.com>
|
||||
S: Supported
|
||||
F: arch/x86/include/asm/uv/
|
||||
F: arch/x86/kernel/apic/x2apic_uv_x.c
|
||||
F: arch/x86/platform/uv/
|
||||
|
||||
X86 VDSO
|
||||
M: Andy Lutomirski <luto@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
|
|
|
|||
7
Makefile
7
Makefile
|
|
@ -2,7 +2,7 @@
|
|||
VERSION = 5
|
||||
PATCHLEVEL = 9
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Kleptomaniac Octopus
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
@ -265,8 +265,7 @@ no-dot-config-targets := $(clean-targets) \
|
|||
$(version_h) headers headers_% archheaders archscripts \
|
||||
%asm-generic kernelversion %src-pkg dt_binding_check \
|
||||
outputmakefile
|
||||
no-sync-config-targets := $(no-dot-config-targets) install %install \
|
||||
kernelrelease
|
||||
no-sync-config-targets := $(no-dot-config-targets) %install kernelrelease
|
||||
single-targets := %.a %.i %.ko %.lds %.ll %.lst %.mod %.o %.s %.symtypes %/
|
||||
|
||||
config-build :=
|
||||
|
|
@ -292,7 +291,7 @@ ifneq ($(KBUILD_EXTMOD),)
|
|||
endif
|
||||
|
||||
ifeq ($(KBUILD_EXTMOD),)
|
||||
ifneq ($(filter config %config,$(MAKECMDGOALS)),)
|
||||
ifneq ($(filter %config,$(MAKECMDGOALS)),)
|
||||
config-build := 1
|
||||
ifneq ($(words $(MAKECMDGOALS)),1)
|
||||
mixed-build := 1
|
||||
|
|
|
|||
|
|
@ -212,7 +212,7 @@ apply_relocate_add(Elf64_Shdr *sechdrs, const char *strtab,
|
|||
STO_ALPHA_STD_GPLOAD)
|
||||
/* Omit the prologue. */
|
||||
value += 8;
|
||||
/* FALLTHRU */
|
||||
fallthrough;
|
||||
case R_ALPHA_BRADDR:
|
||||
value -= (u64)location + 4;
|
||||
if (value & 3)
|
||||
|
|
|
|||
|
|
@ -453,7 +453,7 @@ syscall_restart(unsigned long r0, unsigned long r19,
|
|||
regs->r0 = EINTR;
|
||||
break;
|
||||
}
|
||||
/* fallthrough */
|
||||
fallthrough;
|
||||
case ERESTARTNOINTR:
|
||||
regs->r0 = r0; /* reset v0 and a3 and replay syscall */
|
||||
regs->r19 = r19;
|
||||
|
|
|
|||
|
|
@ -883,7 +883,7 @@ do_entUnaUser(void __user * va, unsigned long opcode,
|
|||
|
||||
case 0x26: /* sts */
|
||||
fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg));
|
||||
/* FALLTHRU */
|
||||
fallthrough;
|
||||
|
||||
case 0x2c: /* stl */
|
||||
__asm__ __volatile__(
|
||||
|
|
@ -911,7 +911,7 @@ do_entUnaUser(void __user * va, unsigned long opcode,
|
|||
|
||||
case 0x27: /* stt */
|
||||
fake_reg = alpha_read_fp_reg(reg);
|
||||
/* FALLTHRU */
|
||||
fallthrough;
|
||||
|
||||
case 0x2d: /* stq */
|
||||
__asm__ __volatile__(
|
||||
|
|
|
|||
|
|
@ -88,6 +88,8 @@
|
|||
|
||||
arcpct: pct {
|
||||
compatible = "snps,archs-pct";
|
||||
interrupt-parent = <&cpu_intc>;
|
||||
interrupts = <20>;
|
||||
};
|
||||
|
||||
/* TIMER0 with interrupt for clockevent */
|
||||
|
|
@ -208,7 +210,7 @@
|
|||
reg = <0x8000 0x2000>;
|
||||
interrupts = <10>;
|
||||
interrupt-names = "macirq";
|
||||
phy-mode = "rgmii";
|
||||
phy-mode = "rgmii-id";
|
||||
snps,pbl = <32>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
clocks = <&gmacclk>;
|
||||
|
|
@ -226,7 +228,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
phy0: ethernet-phy@0 {
|
||||
phy0: ethernet-phy@0 { /* Micrel KSZ9031 */
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -18,10 +18,10 @@
|
|||
* vineetg: April 2010
|
||||
* -Switched pgtable_t from being struct page * to unsigned long
|
||||
* =Needed so that Page Table allocator (pte_alloc_one) is not forced to
|
||||
* to deal with struct page. Thay way in future we can make it allocate
|
||||
* deal with struct page. That way in future we can make it allocate
|
||||
* multiple PG Tbls in one Page Frame
|
||||
* =sweet side effect is avoiding calls to ugly page_address( ) from the
|
||||
* pg-tlb allocator sub-sys (pte_alloc_one, ptr_free, pmd_populate
|
||||
* pg-tlb allocator sub-sys (pte_alloc_one, ptr_free, pmd_populate)
|
||||
*
|
||||
* Amit Bhor, Sameer Dhavale: Codito Technologies 2004
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -339,7 +339,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,
|
|||
|
||||
case op_LDWX_S: /* LDWX_S c, [b, u6] */
|
||||
state->x = 1;
|
||||
/* intentional fall-through */
|
||||
fallthrough;
|
||||
|
||||
case op_LDW_S: /* LDW_S c, [b, u6] */
|
||||
state->zz = 2;
|
||||
|
|
|
|||
|
|
@ -562,7 +562,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
|
|||
{
|
||||
struct arc_reg_pct_build pct_bcr;
|
||||
struct arc_reg_cc_build cc_bcr;
|
||||
int i, has_interrupts;
|
||||
int i, has_interrupts, irq;
|
||||
int counter_size; /* in bits */
|
||||
|
||||
union cc_name {
|
||||
|
|
@ -637,13 +637,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
|
|||
.attr_groups = arc_pmu->attr_groups,
|
||||
};
|
||||
|
||||
if (has_interrupts) {
|
||||
int irq = platform_get_irq(pdev, 0);
|
||||
|
||||
if (irq < 0) {
|
||||
pr_err("Cannot get IRQ number for the platform\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
if (has_interrupts && (irq = platform_get_irq(pdev, 0) >= 0)) {
|
||||
|
||||
arc_pmu->irq = irq;
|
||||
|
||||
|
|
@ -652,9 +646,9 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
|
|||
this_cpu_ptr(&arc_pmu_cpu));
|
||||
|
||||
on_each_cpu(arc_cpu_pmu_irq_init, &irq, 1);
|
||||
|
||||
} else
|
||||
} else {
|
||||
arc_pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
|
||||
}
|
||||
|
||||
/*
|
||||
* perf parser doesn't really like '-' symbol in events name, so let's
|
||||
|
|
|
|||
|
|
@ -321,7 +321,7 @@ static void arc_restart_syscall(struct k_sigaction *ka, struct pt_regs *regs)
|
|||
regs->r0 = -EINTR;
|
||||
break;
|
||||
}
|
||||
/* fallthrough */
|
||||
fallthrough;
|
||||
|
||||
case -ERESTARTNOINTR:
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -18,44 +18,37 @@
|
|||
|
||||
#define ARC_PATH_MAX 256
|
||||
|
||||
/*
|
||||
* Common routine to print scratch regs (r0-r12) or callee regs (r13-r25)
|
||||
* -Prints 3 regs per line and a CR.
|
||||
* -To continue, callee regs right after scratch, special handling of CR
|
||||
*/
|
||||
static noinline void print_reg_file(long *reg_rev, int start_num)
|
||||
static noinline void print_regs_scratch(struct pt_regs *regs)
|
||||
{
|
||||
unsigned int i;
|
||||
char buf[512];
|
||||
int n = 0, len = sizeof(buf);
|
||||
pr_cont("BTA: 0x%08lx\n SP: 0x%08lx FP: 0x%08lx BLK: %pS\n",
|
||||
regs->bta, regs->sp, regs->fp, (void *)regs->blink);
|
||||
pr_cont("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n",
|
||||
regs->lp_start, regs->lp_end, regs->lp_count);
|
||||
|
||||
for (i = start_num; i < start_num + 13; i++) {
|
||||
n += scnprintf(buf + n, len - n, "r%02u: 0x%08lx\t",
|
||||
i, (unsigned long)*reg_rev);
|
||||
|
||||
if (((i + 1) % 3) == 0)
|
||||
n += scnprintf(buf + n, len - n, "\n");
|
||||
|
||||
/* because pt_regs has regs reversed: r12..r0, r25..r13 */
|
||||
if (is_isa_arcv2() && start_num == 0)
|
||||
reg_rev++;
|
||||
else
|
||||
reg_rev--;
|
||||
}
|
||||
|
||||
if (start_num != 0)
|
||||
n += scnprintf(buf + n, len - n, "\n\n");
|
||||
|
||||
/* To continue printing callee regs on same line as scratch regs */
|
||||
if (start_num == 0)
|
||||
pr_info("%s", buf);
|
||||
else
|
||||
pr_cont("%s\n", buf);
|
||||
pr_info("r00: 0x%08lx\tr01: 0x%08lx\tr02: 0x%08lx\n" \
|
||||
"r03: 0x%08lx\tr04: 0x%08lx\tr05: 0x%08lx\n" \
|
||||
"r06: 0x%08lx\tr07: 0x%08lx\tr08: 0x%08lx\n" \
|
||||
"r09: 0x%08lx\tr10: 0x%08lx\tr11: 0x%08lx\n" \
|
||||
"r12: 0x%08lx\t",
|
||||
regs->r0, regs->r1, regs->r2,
|
||||
regs->r3, regs->r4, regs->r5,
|
||||
regs->r6, regs->r7, regs->r8,
|
||||
regs->r9, regs->r10, regs->r11,
|
||||
regs->r12);
|
||||
}
|
||||
|
||||
static void show_callee_regs(struct callee_regs *cregs)
|
||||
static void print_regs_callee(struct callee_regs *regs)
|
||||
{
|
||||
print_reg_file(&(cregs->r13), 13);
|
||||
pr_cont("r13: 0x%08lx\tr14: 0x%08lx\n" \
|
||||
"r15: 0x%08lx\tr16: 0x%08lx\tr17: 0x%08lx\n" \
|
||||
"r18: 0x%08lx\tr19: 0x%08lx\tr20: 0x%08lx\n" \
|
||||
"r21: 0x%08lx\tr22: 0x%08lx\tr23: 0x%08lx\n" \
|
||||
"r24: 0x%08lx\tr25: 0x%08lx\n",
|
||||
regs->r13, regs->r14,
|
||||
regs->r15, regs->r16, regs->r17,
|
||||
regs->r18, regs->r19, regs->r20,
|
||||
regs->r21, regs->r22, regs->r23,
|
||||
regs->r24, regs->r25);
|
||||
}
|
||||
|
||||
static void print_task_path_n_nm(struct task_struct *tsk)
|
||||
|
|
@ -175,7 +168,7 @@ static void show_ecr_verbose(struct pt_regs *regs)
|
|||
void show_regs(struct pt_regs *regs)
|
||||
{
|
||||
struct task_struct *tsk = current;
|
||||
struct callee_regs *cregs;
|
||||
struct callee_regs *cregs = (struct callee_regs *)tsk->thread.callee_reg;
|
||||
|
||||
/*
|
||||
* generic code calls us with preemption disabled, but some calls
|
||||
|
|
@ -204,25 +197,15 @@ void show_regs(struct pt_regs *regs)
|
|||
STS_BIT(regs, A2), STS_BIT(regs, A1),
|
||||
STS_BIT(regs, E2), STS_BIT(regs, E1));
|
||||
#else
|
||||
pr_cont(" [%2s%2s%2s%2s]",
|
||||
pr_cont(" [%2s%2s%2s%2s] ",
|
||||
STS_BIT(regs, IE),
|
||||
(regs->status32 & STATUS_U_MASK) ? "U " : "K ",
|
||||
STS_BIT(regs, DE), STS_BIT(regs, AE));
|
||||
#endif
|
||||
pr_cont(" BTA: 0x%08lx\n SP: 0x%08lx FP: 0x%08lx BLK: %pS\n",
|
||||
regs->bta, regs->sp, regs->fp, (void *)regs->blink);
|
||||
pr_info("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n",
|
||||
regs->lp_start, regs->lp_end, regs->lp_count);
|
||||
|
||||
/* print regs->r0 thru regs->r12
|
||||
* Sequential printing was generating horrible code
|
||||
*/
|
||||
print_reg_file(&(regs->r0), 0);
|
||||
|
||||
/* If Callee regs were saved, display them too */
|
||||
cregs = (struct callee_regs *)current->thread.callee_reg;
|
||||
print_regs_scratch(regs);
|
||||
if (cregs)
|
||||
show_callee_regs(cregs);
|
||||
print_regs_callee(cregs);
|
||||
|
||||
preempt_disable();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -572,7 +572,7 @@ static unsigned long read_pointer(const u8 **pLoc, const void *end,
|
|||
#else
|
||||
BUILD_BUG_ON(sizeof(u32) != sizeof(value));
|
||||
#endif
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case DW_EH_PE_native:
|
||||
if (end < (const void *)(ptr.pul + 1))
|
||||
return 0;
|
||||
|
|
@ -827,7 +827,7 @@ static int processCFI(const u8 *start, const u8 *end, unsigned long targetLoc,
|
|||
case DW_CFA_def_cfa:
|
||||
state->cfa.reg = get_uleb128(&ptr.p8, end);
|
||||
unw_debug("cfa_def_cfa: r%lu ", state->cfa.reg);
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case DW_CFA_def_cfa_offset:
|
||||
state->cfa.offs = get_uleb128(&ptr.p8, end);
|
||||
unw_debug("cfa_def_cfa_offset: 0x%lx ",
|
||||
|
|
@ -835,7 +835,7 @@ static int processCFI(const u8 *start, const u8 *end, unsigned long targetLoc,
|
|||
break;
|
||||
case DW_CFA_def_cfa_sf:
|
||||
state->cfa.reg = get_uleb128(&ptr.p8, end);
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case DW_CFA_def_cfa_offset_sf:
|
||||
state->cfa.offs = get_sleb128(&ptr.p8, end)
|
||||
* state->dataAlign;
|
||||
|
|
|
|||
|
|
@ -26,8 +26,8 @@ static unsigned long low_mem_sz;
|
|||
|
||||
#ifdef CONFIG_HIGHMEM
|
||||
static unsigned long min_high_pfn, max_high_pfn;
|
||||
static u64 high_mem_start;
|
||||
static u64 high_mem_sz;
|
||||
static phys_addr_t high_mem_start;
|
||||
static phys_addr_t high_mem_sz;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DISCONTIGMEM
|
||||
|
|
@ -69,6 +69,7 @@ void __init early_init_dt_add_memory_arch(u64 base, u64 size)
|
|||
high_mem_sz = size;
|
||||
in_use = 1;
|
||||
memblock_add_node(base, size, 1);
|
||||
memblock_reserve(base, size);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -157,7 +158,7 @@ void __init setup_arch_memory(void)
|
|||
min_high_pfn = PFN_DOWN(high_mem_start);
|
||||
max_high_pfn = PFN_DOWN(high_mem_start + high_mem_sz);
|
||||
|
||||
max_zone_pfn[ZONE_HIGHMEM] = max_high_pfn;
|
||||
max_zone_pfn[ZONE_HIGHMEM] = min_low_pfn;
|
||||
|
||||
high_memory = (void *)(min_high_pfn << PAGE_SHIFT);
|
||||
kmap_init();
|
||||
|
|
@ -166,6 +167,17 @@ void __init setup_arch_memory(void)
|
|||
free_area_init(max_zone_pfn);
|
||||
}
|
||||
|
||||
static void __init highmem_init(void)
|
||||
{
|
||||
#ifdef CONFIG_HIGHMEM
|
||||
unsigned long tmp;
|
||||
|
||||
memblock_free(high_mem_start, high_mem_sz);
|
||||
for (tmp = min_high_pfn; tmp < max_high_pfn; tmp++)
|
||||
free_highmem_page(pfn_to_page(tmp));
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* mem_init - initializes memory
|
||||
*
|
||||
|
|
@ -174,14 +186,7 @@ void __init setup_arch_memory(void)
|
|||
*/
|
||||
void __init mem_init(void)
|
||||
{
|
||||
#ifdef CONFIG_HIGHMEM
|
||||
unsigned long tmp;
|
||||
|
||||
reset_all_zones_managed_pages();
|
||||
for (tmp = min_high_pfn; tmp < max_high_pfn; tmp++)
|
||||
free_highmem_page(pfn_to_page(tmp));
|
||||
#endif
|
||||
|
||||
memblock_free_all();
|
||||
highmem_init();
|
||||
mem_init_print_info(NULL);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -33,7 +33,6 @@
|
|||
#define CTOP_AUX_DPC (CTOP_AUX_BASE + 0x02C)
|
||||
#define CTOP_AUX_LPC (CTOP_AUX_BASE + 0x030)
|
||||
#define CTOP_AUX_EFLAGS (CTOP_AUX_BASE + 0x080)
|
||||
#define CTOP_AUX_IACK (CTOP_AUX_BASE + 0x088)
|
||||
#define CTOP_AUX_GPA1 (CTOP_AUX_BASE + 0x08C)
|
||||
#define CTOP_AUX_UDMC (CTOP_AUX_BASE + 0x300)
|
||||
|
||||
|
|
|
|||
|
|
@ -49,6 +49,7 @@ config ARM
|
|||
select GENERIC_ARCH_TOPOLOGY if ARM_CPU_TOPOLOGY
|
||||
select GENERIC_ATOMIC64 if CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI
|
||||
select GENERIC_CLOCKEVENTS_BROADCAST if SMP
|
||||
select GENERIC_IRQ_IPI if SMP
|
||||
select GENERIC_CPU_AUTOPROBE
|
||||
select GENERIC_EARLY_IOREMAP
|
||||
select GENERIC_IDLE_POLL_SETUP
|
||||
|
|
|
|||
|
|
@ -6,29 +6,12 @@
|
|||
#include <linux/threads.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
/* number of IPIS _not_ including IPI_CPU_BACKTRACE */
|
||||
#define NR_IPI 7
|
||||
|
||||
typedef struct {
|
||||
unsigned int __softirq_pending;
|
||||
#ifdef CONFIG_SMP
|
||||
unsigned int ipi_irqs[NR_IPI];
|
||||
#endif
|
||||
} ____cacheline_aligned irq_cpustat_t;
|
||||
|
||||
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
|
||||
|
||||
#define __inc_irq_stat(cpu, member) __IRQ_STAT(cpu, member)++
|
||||
#define __get_irq_stat(cpu, member) __IRQ_STAT(cpu, member)
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
u64 smp_irq_stat_cpu(unsigned int cpu);
|
||||
#else
|
||||
#define smp_irq_stat_cpu(cpu) 0
|
||||
#endif
|
||||
|
||||
#define arch_irq_stat_cpu smp_irq_stat_cpu
|
||||
|
||||
#define __ARCH_IRQ_EXIT_IRQS_DISABLED 1
|
||||
|
||||
#endif /* __ASM_HARDIRQ_H */
|
||||
|
|
|
|||
|
|
@ -39,11 +39,10 @@ void handle_IPI(int ipinr, struct pt_regs *regs);
|
|||
*/
|
||||
extern void smp_init_cpus(void);
|
||||
|
||||
|
||||
/*
|
||||
* Provide a function to raise an IPI cross call on CPUs in callmap.
|
||||
* Register IPI interrupts with the arch SMP code
|
||||
*/
|
||||
extern void set_smp_cross_call(void (*)(const struct cpumask *, unsigned int));
|
||||
extern void set_smp_ipi_range(int ipi_base, int nr_ipi);
|
||||
|
||||
/*
|
||||
* Called from platform specific assembly code, this is the
|
||||
|
|
|
|||
|
|
@ -547,7 +547,7 @@ static int arch_build_bp_info(struct perf_event *bp,
|
|||
if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE)
|
||||
&& max_watchpoint_len >= 8)
|
||||
break;
|
||||
/* Else, fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
|
@ -612,12 +612,12 @@ int hw_breakpoint_arch_parse(struct perf_event *bp,
|
|||
/* Allow halfword watchpoints and breakpoints. */
|
||||
if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
|
||||
break;
|
||||
/* Else, fall through */
|
||||
fallthrough;
|
||||
case 3:
|
||||
/* Allow single byte watchpoint. */
|
||||
if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
|
||||
break;
|
||||
/* Else, fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
|
|
@ -884,7 +884,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr,
|
|||
break;
|
||||
case ARM_ENTRY_ASYNC_WATCHPOINT:
|
||||
WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n");
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case ARM_ENTRY_SYNC_WATCHPOINT:
|
||||
watchpoint_handler(addr, fsr, regs);
|
||||
break;
|
||||
|
|
@ -933,7 +933,7 @@ static bool core_has_os_save_restore(void)
|
|||
ARM_DBG_READ(c1, c1, 4, oslsr);
|
||||
if (oslsr & ARM_OSLSR_OSLM0)
|
||||
return true;
|
||||
/* Else, fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -18,7 +18,6 @@
|
|||
* IRQ's are in fact implemented a bit like signal handlers for the kernel.
|
||||
* Naturally it's not a 1:1 relation, but there are similarities.
|
||||
*/
|
||||
#include <linux/kernel_stat.h>
|
||||
#include <linux/signal.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
|
|
|||
|
|
@ -596,7 +596,7 @@ static int do_signal(struct pt_regs *regs, int syscall)
|
|||
switch (retval) {
|
||||
case -ERESTART_RESTARTBLOCK:
|
||||
restart -= 2;
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case -ERESTARTNOHAND:
|
||||
case -ERESTARTSYS:
|
||||
case -ERESTARTNOINTR:
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@
|
|||
#include <linux/completion.h>
|
||||
#include <linux/cpufreq.h>
|
||||
#include <linux/irq_work.h>
|
||||
#include <linux/kernel_stat.h>
|
||||
|
||||
#include <linux/atomic.h>
|
||||
#include <asm/bugs.h>
|
||||
|
|
@ -65,18 +66,26 @@ enum ipi_msg_type {
|
|||
IPI_CPU_STOP,
|
||||
IPI_IRQ_WORK,
|
||||
IPI_COMPLETION,
|
||||
NR_IPI,
|
||||
/*
|
||||
* CPU_BACKTRACE is special and not included in NR_IPI
|
||||
* or tracable with trace_ipi_*
|
||||
*/
|
||||
IPI_CPU_BACKTRACE,
|
||||
IPI_CPU_BACKTRACE = NR_IPI,
|
||||
/*
|
||||
* SGI8-15 can be reserved by secure firmware, and thus may
|
||||
* not be usable by the kernel. Please keep the above limited
|
||||
* to at most 8 entries.
|
||||
*/
|
||||
MAX_IPI
|
||||
};
|
||||
|
||||
static int ipi_irq_base __read_mostly;
|
||||
static int nr_ipi __read_mostly = NR_IPI;
|
||||
static struct irq_desc *ipi_desc[MAX_IPI] __read_mostly;
|
||||
|
||||
static void ipi_setup(int cpu);
|
||||
|
||||
static DECLARE_COMPLETION(cpu_running);
|
||||
|
||||
static struct smp_operations smp_ops __ro_after_init;
|
||||
|
|
@ -226,6 +235,17 @@ int platform_can_hotplug_cpu(unsigned int cpu)
|
|||
return cpu != 0;
|
||||
}
|
||||
|
||||
static void ipi_teardown(int cpu)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (WARN_ON_ONCE(!ipi_irq_base))
|
||||
return;
|
||||
|
||||
for (i = 0; i < nr_ipi; i++)
|
||||
disable_percpu_irq(ipi_irq_base + i);
|
||||
}
|
||||
|
||||
/*
|
||||
* __cpu_disable runs on the processor to be shutdown.
|
||||
*/
|
||||
|
|
@ -247,6 +267,7 @@ int __cpu_disable(void)
|
|||
* and we must not schedule until we're ready to give up the cpu.
|
||||
*/
|
||||
set_cpu_online(cpu, false);
|
||||
ipi_teardown(cpu);
|
||||
|
||||
/*
|
||||
* OK - migrate IRQs away from this CPU
|
||||
|
|
@ -422,6 +443,8 @@ asmlinkage void secondary_start_kernel(void)
|
|||
|
||||
notify_cpu_starting(cpu);
|
||||
|
||||
ipi_setup(cpu);
|
||||
|
||||
calibrate_delay();
|
||||
|
||||
smp_store_cpu_info(cpu);
|
||||
|
|
@ -500,14 +523,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
|
|||
}
|
||||
}
|
||||
|
||||
static void (*__smp_cross_call)(const struct cpumask *, unsigned int);
|
||||
|
||||
void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
|
||||
{
|
||||
if (!__smp_cross_call)
|
||||
__smp_cross_call = fn;
|
||||
}
|
||||
|
||||
static const char *ipi_types[NR_IPI] __tracepoint_string = {
|
||||
#define S(x,s) [x] = s
|
||||
S(IPI_WAKEUP, "CPU wakeup interrupts"),
|
||||
|
|
@ -519,38 +534,28 @@ static const char *ipi_types[NR_IPI] __tracepoint_string = {
|
|||
S(IPI_COMPLETION, "completion interrupts"),
|
||||
};
|
||||
|
||||
static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
|
||||
{
|
||||
trace_ipi_raise_rcuidle(target, ipi_types[ipinr]);
|
||||
__smp_cross_call(target, ipinr);
|
||||
}
|
||||
static void smp_cross_call(const struct cpumask *target, unsigned int ipinr);
|
||||
|
||||
void show_ipi_list(struct seq_file *p, int prec)
|
||||
{
|
||||
unsigned int cpu, i;
|
||||
|
||||
for (i = 0; i < NR_IPI; i++) {
|
||||
unsigned int irq;
|
||||
|
||||
if (!ipi_desc[i])
|
||||
continue;
|
||||
|
||||
irq = irq_desc_get_irq(ipi_desc[i]);
|
||||
seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
|
||||
|
||||
for_each_online_cpu(cpu)
|
||||
seq_printf(p, "%10u ",
|
||||
__get_irq_stat(cpu, ipi_irqs[i]));
|
||||
seq_printf(p, "%10u ", kstat_irqs_cpu(irq, cpu));
|
||||
|
||||
seq_printf(p, " %s\n", ipi_types[i]);
|
||||
}
|
||||
}
|
||||
|
||||
u64 smp_irq_stat_cpu(unsigned int cpu)
|
||||
{
|
||||
u64 sum = 0;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < NR_IPI; i++)
|
||||
sum += __get_irq_stat(cpu, ipi_irqs[i]);
|
||||
|
||||
return sum;
|
||||
}
|
||||
|
||||
void arch_send_call_function_ipi_mask(const struct cpumask *mask)
|
||||
{
|
||||
smp_cross_call(mask, IPI_CALL_FUNC);
|
||||
|
|
@ -627,15 +632,12 @@ asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
|
|||
handle_IPI(ipinr, regs);
|
||||
}
|
||||
|
||||
void handle_IPI(int ipinr, struct pt_regs *regs)
|
||||
static void do_handle_IPI(int ipinr)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
struct pt_regs *old_regs = set_irq_regs(regs);
|
||||
|
||||
if ((unsigned)ipinr < NR_IPI) {
|
||||
if ((unsigned)ipinr < NR_IPI)
|
||||
trace_ipi_entry_rcuidle(ipi_types[ipinr]);
|
||||
__inc_irq_stat(cpu, ipi_irqs[ipinr]);
|
||||
}
|
||||
|
||||
switch (ipinr) {
|
||||
case IPI_WAKEUP:
|
||||
|
|
@ -643,9 +645,7 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
|
|||
|
||||
#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
|
||||
case IPI_TIMER:
|
||||
irq_enter();
|
||||
tick_receive_broadcast();
|
||||
irq_exit();
|
||||
break;
|
||||
#endif
|
||||
|
||||
|
|
@ -654,36 +654,26 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
|
|||
break;
|
||||
|
||||
case IPI_CALL_FUNC:
|
||||
irq_enter();
|
||||
generic_smp_call_function_interrupt();
|
||||
irq_exit();
|
||||
break;
|
||||
|
||||
case IPI_CPU_STOP:
|
||||
irq_enter();
|
||||
ipi_cpu_stop(cpu);
|
||||
irq_exit();
|
||||
break;
|
||||
|
||||
#ifdef CONFIG_IRQ_WORK
|
||||
case IPI_IRQ_WORK:
|
||||
irq_enter();
|
||||
irq_work_run();
|
||||
irq_exit();
|
||||
break;
|
||||
#endif
|
||||
|
||||
case IPI_COMPLETION:
|
||||
irq_enter();
|
||||
ipi_complete(cpu);
|
||||
irq_exit();
|
||||
break;
|
||||
|
||||
case IPI_CPU_BACKTRACE:
|
||||
printk_nmi_enter();
|
||||
irq_enter();
|
||||
nmi_cpu_backtrace(regs);
|
||||
irq_exit();
|
||||
nmi_cpu_backtrace(get_irq_regs());
|
||||
printk_nmi_exit();
|
||||
break;
|
||||
|
||||
|
|
@ -695,9 +685,67 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
|
|||
|
||||
if ((unsigned)ipinr < NR_IPI)
|
||||
trace_ipi_exit_rcuidle(ipi_types[ipinr]);
|
||||
}
|
||||
|
||||
/* Legacy version, should go away once all irqchips have been converted */
|
||||
void handle_IPI(int ipinr, struct pt_regs *regs)
|
||||
{
|
||||
struct pt_regs *old_regs = set_irq_regs(regs);
|
||||
|
||||
irq_enter();
|
||||
do_handle_IPI(ipinr);
|
||||
irq_exit();
|
||||
|
||||
set_irq_regs(old_regs);
|
||||
}
|
||||
|
||||
static irqreturn_t ipi_handler(int irq, void *data)
|
||||
{
|
||||
do_handle_IPI(irq - ipi_irq_base);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
|
||||
{
|
||||
trace_ipi_raise_rcuidle(target, ipi_types[ipinr]);
|
||||
__ipi_send_mask(ipi_desc[ipinr], target);
|
||||
}
|
||||
|
||||
static void ipi_setup(int cpu)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (WARN_ON_ONCE(!ipi_irq_base))
|
||||
return;
|
||||
|
||||
for (i = 0; i < nr_ipi; i++)
|
||||
enable_percpu_irq(ipi_irq_base + i, 0);
|
||||
}
|
||||
|
||||
void __init set_smp_ipi_range(int ipi_base, int n)
|
||||
{
|
||||
int i;
|
||||
|
||||
WARN_ON(n < MAX_IPI);
|
||||
nr_ipi = min(n, MAX_IPI);
|
||||
|
||||
for (i = 0; i < nr_ipi; i++) {
|
||||
int err;
|
||||
|
||||
err = request_percpu_irq(ipi_base + i, ipi_handler,
|
||||
"IPI", &irq_stat);
|
||||
WARN_ON(err);
|
||||
|
||||
ipi_desc[i] = irq_to_desc(ipi_base + i);
|
||||
irq_set_status_flags(ipi_base + i, IRQ_HIDDEN);
|
||||
}
|
||||
|
||||
ipi_irq_base = ipi_base;
|
||||
|
||||
/* Setup the boot CPU immediately */
|
||||
ipi_setup(smp_processor_id());
|
||||
}
|
||||
|
||||
void smp_send_reschedule(int cpu)
|
||||
{
|
||||
smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
|
||||
|
|
@ -805,7 +853,7 @@ core_initcall(register_cpufreq_notifier);
|
|||
|
||||
static void raise_nmi(cpumask_t *mask)
|
||||
{
|
||||
__smp_cross_call(mask, IPI_CPU_BACKTRACE);
|
||||
__ipi_send_mask(ipi_desc[IPI_CPU_BACKTRACE], mask);
|
||||
}
|
||||
|
||||
void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@ static int crunch_do(struct notifier_block *self, unsigned long cmd, void *t)
|
|||
* FALLTHROUGH: Ensure we don't try to overwrite our newly
|
||||
* initialised state information on the first fault.
|
||||
*/
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
|
||||
case THREAD_NOTIFY_EXIT:
|
||||
crunch_task_release(thread);
|
||||
|
|
|
|||
|
|
@ -123,19 +123,19 @@ void mmp2_pm_enter_lowpower_mode(int state)
|
|||
case POWER_MODE_SYS_SLEEP:
|
||||
apcr |= MPMU_PCR_PJ_SLPEN; /* set the SLPEN bit */
|
||||
apcr |= MPMU_PCR_PJ_VCTCXOSD; /* set VCTCXOSD */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_CHIP_SLEEP:
|
||||
apcr |= MPMU_PCR_PJ_SLPEN;
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_APPS_SLEEP:
|
||||
apcr |= MPMU_PCR_PJ_APBSD; /* set APBSD */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_APPS_IDLE:
|
||||
apcr |= MPMU_PCR_PJ_AXISD; /* set AXISDD bit */
|
||||
apcr |= MPMU_PCR_PJ_DDRCORSD; /* set DDRCORSD bit */
|
||||
idle_cfg |= APMU_PJ_IDLE_CFG_PJ_PWRDWN; /* PJ power down */
|
||||
apcr |= MPMU_PCR_PJ_SPSD;
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_CORE_EXTIDLE:
|
||||
idle_cfg |= APMU_PJ_IDLE_CFG_PJ_IDLE; /* set the IDLE bit */
|
||||
idle_cfg &= ~APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK;
|
||||
|
|
|
|||
|
|
@ -145,23 +145,23 @@ void pxa910_pm_enter_lowpower_mode(int state)
|
|||
case POWER_MODE_UDR:
|
||||
/* only shutdown APB in UDR */
|
||||
apcr |= MPMU_APCR_STBYEN | MPMU_APCR_APBSD;
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_SYS_SLEEP:
|
||||
apcr |= MPMU_APCR_SLPEN; /* set the SLPEN bit */
|
||||
apcr |= MPMU_APCR_VCTCXOSD; /* set VCTCXOSD */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_APPS_SLEEP:
|
||||
apcr |= MPMU_APCR_DDRCORSD; /* set DDRCORSD */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_APPS_IDLE:
|
||||
apcr |= MPMU_APCR_AXISD; /* set AXISDD bit */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_CORE_EXTIDLE:
|
||||
idle_cfg |= APMU_MOH_IDLE_CFG_MOH_IDLE;
|
||||
idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWRDWN;
|
||||
idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWR_SW(3)
|
||||
| APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(3);
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_CORE_INTIDLE:
|
||||
break;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -396,7 +396,6 @@ void __init omap3xxx_check_revision(void)
|
|||
cpu_rev = "3.1";
|
||||
break;
|
||||
case 7:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
/* Use the latest known revision as default */
|
||||
omap_revision = OMAP3430_REV_ES3_1_2;
|
||||
|
|
@ -416,7 +415,6 @@ void __init omap3xxx_check_revision(void)
|
|||
cpu_rev = "1.0";
|
||||
break;
|
||||
case 1:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
omap_revision = AM35XX_REV_ES1_1;
|
||||
cpu_rev = "1.1";
|
||||
|
|
@ -435,7 +433,6 @@ void __init omap3xxx_check_revision(void)
|
|||
cpu_rev = "1.1";
|
||||
break;
|
||||
case 2:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
omap_revision = OMAP3630_REV_ES1_2;
|
||||
cpu_rev = "1.2";
|
||||
|
|
@ -456,7 +453,6 @@ void __init omap3xxx_check_revision(void)
|
|||
cpu_rev = "2.0";
|
||||
break;
|
||||
case 3:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
omap_revision = TI8168_REV_ES2_1;
|
||||
cpu_rev = "2.1";
|
||||
|
|
@ -473,7 +469,6 @@ void __init omap3xxx_check_revision(void)
|
|||
cpu_rev = "2.0";
|
||||
break;
|
||||
case 2:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
omap_revision = AM335X_REV_ES2_1;
|
||||
cpu_rev = "2.1";
|
||||
|
|
@ -491,7 +486,6 @@ void __init omap3xxx_check_revision(void)
|
|||
cpu_rev = "1.1";
|
||||
break;
|
||||
case 2:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
omap_revision = AM437X_REV_ES1_2;
|
||||
cpu_rev = "1.2";
|
||||
|
|
@ -502,7 +496,6 @@ void __init omap3xxx_check_revision(void)
|
|||
case 0xb968:
|
||||
switch (rev) {
|
||||
case 0:
|
||||
/* FALLTHROUGH */
|
||||
case 1:
|
||||
omap_revision = TI8148_REV_ES1_0;
|
||||
cpu_rev = "1.0";
|
||||
|
|
@ -512,7 +505,6 @@ void __init omap3xxx_check_revision(void)
|
|||
cpu_rev = "2.0";
|
||||
break;
|
||||
case 3:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
omap_revision = TI8148_REV_ES2_1;
|
||||
cpu_rev = "2.1";
|
||||
|
|
|
|||
|
|
@ -240,7 +240,7 @@ static int _omap_device_notifier_call(struct notifier_block *nb,
|
|||
if (pdev->dev.of_node)
|
||||
omap_device_build_from_dt(pdev);
|
||||
omap_auxdata_legacy_init(dev);
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
od = to_omap_device(pdev);
|
||||
if (od)
|
||||
|
|
|
|||
|
|
@ -298,11 +298,7 @@ static void omap3_pm_idle(void)
|
|||
if (omap_irq_pending())
|
||||
return;
|
||||
|
||||
trace_cpu_idle_rcuidle(1, smp_processor_id());
|
||||
|
||||
omap_sram_idle();
|
||||
|
||||
trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SUSPEND
|
||||
|
|
|
|||
|
|
@ -624,7 +624,7 @@ static void __init dns323_init(void)
|
|||
dns323ab_leds[0].active_low = 1;
|
||||
gpio_request(DNS323_GPIO_LED_POWER1, "Power Led Enable");
|
||||
gpio_direction_output(DNS323_GPIO_LED_POWER1, 0);
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case DNS323_REV_B1:
|
||||
i2c_register_board_info(0, dns323ab_i2c_devices,
|
||||
ARRAY_SIZE(dns323ab_i2c_devices));
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@ static int __init parse_tag_acorn(const struct tag *tag)
|
|||
switch (tag->u.acorn.vram_pages) {
|
||||
case 512:
|
||||
vram_size += PAGE_SIZE * 256;
|
||||
/* Fall through - ??? */
|
||||
fallthrough; /* ??? */
|
||||
case 256:
|
||||
vram_size += PAGE_SIZE * 256;
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -70,7 +70,7 @@ static void __init tegra_cpu_reset_handler_enable(void)
|
|||
switch (err) {
|
||||
case -ENOSYS:
|
||||
tegra_cpu_reset_handler_set(reset_address);
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case 0:
|
||||
is_enabled = true;
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -694,7 +694,7 @@ thumb2arm(u16 tinstr)
|
|||
return subset[(L<<1) | ((tinstr & (1<<8)) >> 8)] |
|
||||
(tinstr & 255); /* register_list */
|
||||
}
|
||||
/* Else, fall through - for illegal instruction case */
|
||||
fallthrough; /* for illegal instruction case */
|
||||
|
||||
default:
|
||||
return BAD_INSTR;
|
||||
|
|
@ -750,7 +750,7 @@ do_alignment_t32_to_handler(u32 *pinstr, struct pt_regs *regs,
|
|||
case 0xe8e0:
|
||||
case 0xe9e0:
|
||||
poffset->un = (tinst2 & 0xff) << 2;
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
|
||||
case 0xe940:
|
||||
case 0xe9c0:
|
||||
|
|
|
|||
|
|
@ -71,7 +71,7 @@ static void cpu_v7_spectre_init(void)
|
|||
/* Other ARM CPUs require no workaround */
|
||||
if (read_cpuid_implementor() == ARM_CPU_IMP_ARM)
|
||||
break;
|
||||
/* fallthrough */
|
||||
fallthrough;
|
||||
/* Cortex A57/A72 require firmware workaround */
|
||||
case ARM_CPU_PART_CORTEX_A57:
|
||||
case ARM_CPU_PART_CORTEX_A72: {
|
||||
|
|
|
|||
|
|
@ -309,14 +309,14 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
|
|||
* not supported by current hardware on OMAP1
|
||||
* w |= (0x03 << 7);
|
||||
*/
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case OMAP_DMA_DATA_BURST_16:
|
||||
if (dma_omap2plus()) {
|
||||
burst = 0x3;
|
||||
break;
|
||||
}
|
||||
/* OMAP1 don't support burst 16 */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
|
|
@ -393,7 +393,7 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
|
|||
break;
|
||||
}
|
||||
/* OMAP1 don't support burst 16 */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
printk(KERN_ERR "Invalid DMA burst mode\n");
|
||||
BUG();
|
||||
|
|
|
|||
|
|
@ -307,7 +307,7 @@ static bool __kprobes decode_regs(probes_opcode_t *pinsn, u32 regs, bool modify)
|
|||
case REG_TYPE_NOPCWB:
|
||||
if (!is_writeback(insn))
|
||||
break; /* No writeback, so any register is OK */
|
||||
/* fall through... */
|
||||
fallthrough;
|
||||
case REG_TYPE_NOPC:
|
||||
case REG_TYPE_NOPCX:
|
||||
/* Reject PC (R15) */
|
||||
|
|
|
|||
|
|
@ -280,7 +280,7 @@ void __kprobes kprobe_handler(struct pt_regs *regs)
|
|||
/* A nested probe was hit in FIQ, it is a BUG */
|
||||
pr_warn("Unrecoverable kprobe detected.\n");
|
||||
dump_kprobe(p);
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
/* impossible cases */
|
||||
BUG();
|
||||
|
|
|
|||
|
|
@ -106,6 +106,7 @@ config ARM64
|
|||
select GENERIC_CPU_VULNERABILITIES
|
||||
select GENERIC_EARLY_IOREMAP
|
||||
select GENERIC_IDLE_POLL_SETUP
|
||||
select GENERIC_IRQ_IPI
|
||||
select GENERIC_IRQ_MULTI_HANDLER
|
||||
select GENERIC_IRQ_PROBE
|
||||
select GENERIC_IRQ_SHOW
|
||||
|
|
|
|||
|
|
@ -82,8 +82,8 @@ endif
|
|||
# compiler to generate them and consequently to break the single image contract
|
||||
# we pass it only to the assembler. This option is utilized only in case of non
|
||||
# integrated assemblers.
|
||||
ifneq ($(CONFIG_AS_HAS_ARMV8_4), y)
|
||||
branch-prot-flags-$(CONFIG_AS_HAS_PAC) += -Wa,-march=armv8.3-a
|
||||
ifeq ($(CONFIG_AS_HAS_PAC), y)
|
||||
asm-arch := armv8.3-a
|
||||
endif
|
||||
endif
|
||||
|
||||
|
|
@ -91,7 +91,12 @@ KBUILD_CFLAGS += $(branch-prot-flags-y)
|
|||
|
||||
ifeq ($(CONFIG_AS_HAS_ARMV8_4), y)
|
||||
# make sure to pass the newest target architecture to -march.
|
||||
KBUILD_CFLAGS += -Wa,-march=armv8.4-a
|
||||
asm-arch := armv8.4-a
|
||||
endif
|
||||
|
||||
ifdef asm-arch
|
||||
KBUILD_CFLAGS += -Wa,-march=$(asm-arch) \
|
||||
-DARM64_ASM_ARCH='"$(asm-arch)"'
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_SHADOW_CALL_STACK), y)
|
||||
|
|
@ -165,6 +170,8 @@ zinstall install:
|
|||
PHONY += vdso_install
|
||||
vdso_install:
|
||||
$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso $@
|
||||
$(if $(CONFIG_COMPAT_VDSO), \
|
||||
$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 $@)
|
||||
|
||||
# We use MRPROPER_FILES and CLEAN_FILES now
|
||||
archclean:
|
||||
|
|
|
|||
|
|
@ -686,6 +686,8 @@
|
|||
clocks = <&pericfg CLK_PERI_MSDC30_0_PD>,
|
||||
<&topckgen CLK_TOP_MSDC50_0_SEL>;
|
||||
clock-names = "source", "hclk";
|
||||
resets = <&pericfg MT7622_PERI_MSDC0_SW_RST>;
|
||||
reset-names = "hrst";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -337,8 +337,9 @@
|
|||
compatible = "nvidia,tegra186-sdhci";
|
||||
reg = <0x0 0x03400000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC1>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC1>,
|
||||
<&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&bpmp TEGRA186_RESET_SDMMC1>;
|
||||
reset-names = "sdhci";
|
||||
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRA &emc>,
|
||||
|
|
@ -366,8 +367,9 @@
|
|||
compatible = "nvidia,tegra186-sdhci";
|
||||
reg = <0x0 0x03420000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC2>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC2>,
|
||||
<&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&bpmp TEGRA186_RESET_SDMMC2>;
|
||||
reset-names = "sdhci";
|
||||
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRAA &emc>,
|
||||
|
|
@ -390,8 +392,9 @@
|
|||
compatible = "nvidia,tegra186-sdhci";
|
||||
reg = <0x0 0x03440000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC3>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC3>,
|
||||
<&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&bpmp TEGRA186_RESET_SDMMC3>;
|
||||
reset-names = "sdhci";
|
||||
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCR &emc>,
|
||||
|
|
@ -416,8 +419,9 @@
|
|||
compatible = "nvidia,tegra186-sdhci";
|
||||
reg = <0x0 0x03460000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC4>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC4>,
|
||||
<&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC4>,
|
||||
<&bpmp TEGRA186_CLK_PLLC4_VCO>;
|
||||
assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>;
|
||||
|
|
|
|||
|
|
@ -460,8 +460,9 @@
|
|||
compatible = "nvidia,tegra194-sdhci";
|
||||
reg = <0x03400000 0x10000>;
|
||||
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA194_CLK_SDMMC1>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA194_CLK_SDMMC1>,
|
||||
<&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&bpmp TEGRA194_RESET_SDMMC1>;
|
||||
reset-names = "sdhci";
|
||||
interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRA &emc>,
|
||||
|
|
@ -485,8 +486,9 @@
|
|||
compatible = "nvidia,tegra194-sdhci";
|
||||
reg = <0x03440000 0x10000>;
|
||||
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA194_CLK_SDMMC3>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA194_CLK_SDMMC3>,
|
||||
<&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&bpmp TEGRA194_RESET_SDMMC3>;
|
||||
reset-names = "sdhci";
|
||||
interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCR &emc>,
|
||||
|
|
@ -511,8 +513,9 @@
|
|||
compatible = "nvidia,tegra194-sdhci";
|
||||
reg = <0x03460000 0x10000>;
|
||||
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA194_CLK_SDMMC4>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
|
||||
<&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
|
||||
<&bpmp TEGRA194_CLK_PLLC4>;
|
||||
assigned-clock-parents =
|
||||
|
|
|
|||
|
|
@ -1194,8 +1194,9 @@
|
|||
compatible = "nvidia,tegra210-sdhci";
|
||||
reg = <0x0 0x700b0000 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
|
||||
<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&tegra_car 14>;
|
||||
reset-names = "sdhci";
|
||||
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
|
||||
|
|
@ -1222,8 +1223,9 @@
|
|||
compatible = "nvidia,tegra210-sdhci";
|
||||
reg = <0x0 0x700b0200 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC2>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC2>,
|
||||
<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&tegra_car 9>;
|
||||
reset-names = "sdhci";
|
||||
pinctrl-names = "sdmmc-1v8-drv";
|
||||
|
|
@ -1239,8 +1241,9 @@
|
|||
compatible = "nvidia,tegra210-sdhci";
|
||||
reg = <0x0 0x700b0400 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC3>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC3>,
|
||||
<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&tegra_car 69>;
|
||||
reset-names = "sdhci";
|
||||
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
|
||||
|
|
@ -1262,8 +1265,9 @@
|
|||
compatible = "nvidia,tegra210-sdhci";
|
||||
reg = <0x0 0x700b0600 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC4>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC4>,
|
||||
<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&tegra_car 15>;
|
||||
reset-names = "sdhci";
|
||||
pinctrl-names = "sdmmc-3v3-drv", "sdmmc-1v8-drv";
|
||||
|
|
|
|||
|
|
@ -153,7 +153,7 @@ static inline bool gic_prio_masking_enabled(void)
|
|||
|
||||
static inline void gic_pmr_mask_irqs(void)
|
||||
{
|
||||
BUILD_BUG_ON(GICD_INT_DEF_PRI < (GIC_PRIO_IRQOFF |
|
||||
BUILD_BUG_ON(GICD_INT_DEF_PRI < (__GIC_PRIO_IRQOFF |
|
||||
GIC_PRIO_PSR_I_SET));
|
||||
BUILD_BUG_ON(GICD_INT_DEF_PRI >= GIC_PRIO_IRQON);
|
||||
/*
|
||||
|
|
@ -162,6 +162,12 @@ static inline void gic_pmr_mask_irqs(void)
|
|||
* are applied to IRQ priorities
|
||||
*/
|
||||
BUILD_BUG_ON((0x80 | (GICD_INT_DEF_PRI >> 1)) >= GIC_PRIO_IRQON);
|
||||
/*
|
||||
* Same situation as above, but now we make sure that we can mask
|
||||
* regular interrupts.
|
||||
*/
|
||||
BUILD_BUG_ON((0x80 | (GICD_INT_DEF_PRI >> 1)) < (__GIC_PRIO_IRQOFF_NS |
|
||||
GIC_PRIO_PSR_I_SET));
|
||||
gic_write_pmr(GIC_PRIO_IRQOFF);
|
||||
}
|
||||
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue