media: staging: tegra-vde: Align bitstream size to 16K
I've noticed that decoding fails sometime if size of bitstream buffer isn't aligned to 16K, probably because HW fetches data from memory in a 16K granularity and if the last chunk of data isn't aligned, HW reads garbage data beyond the dmabuf and tries to parse it. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Hans Verkuil <hansverk@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
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@ -440,7 +440,7 @@ static int tegra_vde_setup_hw_context(struct tegra_vde *vde,
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VDE_WR(value, vde->sxe + 0x4C);
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value = 0x03800000;
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value |= min_t(size_t, bitstream_data_size, SZ_1M);
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value |= bitstream_data_size & GENMASK(19, 15);
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VDE_WR(value, vde->sxe + 0x68);
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@ -522,7 +522,8 @@ static void tegra_vde_detach_and_put_dmabuf(struct dma_buf_attachment *a,
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static int tegra_vde_attach_dmabuf(struct device *dev,
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int fd,
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unsigned long offset,
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unsigned int min_size,
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size_t min_size,
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size_t align_size,
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struct dma_buf_attachment **a,
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dma_addr_t *addr,
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struct sg_table **s,
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@ -540,9 +541,16 @@ static int tegra_vde_attach_dmabuf(struct device *dev,
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return PTR_ERR(dmabuf);
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}
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if (dmabuf->size & (align_size - 1)) {
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dev_err(dev, "Unaligned dmabuf 0x%zX, "
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"should be aligned to 0x%zX\n",
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dmabuf->size, align_size);
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return -EINVAL;
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}
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if ((u64)offset + min_size > dmabuf->size) {
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dev_err(dev, "Too small dmabuf size %zu @0x%lX, "
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"should be at least %d\n",
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"should be at least %zu\n",
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dmabuf->size, offset, min_size);
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return -EINVAL;
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}
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@ -596,7 +604,7 @@ static int tegra_vde_attach_dmabufs_to_frame(struct device *dev,
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int err;
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err = tegra_vde_attach_dmabuf(dev, src->y_fd,
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src->y_offset, csize * 4,
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src->y_offset, csize * 4, SZ_256,
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&frame->y_dmabuf_attachment,
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&frame->y_addr,
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&frame->y_sgt,
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@ -605,7 +613,7 @@ static int tegra_vde_attach_dmabufs_to_frame(struct device *dev,
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return err;
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err = tegra_vde_attach_dmabuf(dev, src->cb_fd,
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src->cb_offset, csize,
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src->cb_offset, csize, SZ_256,
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&frame->cb_dmabuf_attachment,
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&frame->cb_addr,
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&frame->cb_sgt,
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@ -614,7 +622,7 @@ static int tegra_vde_attach_dmabufs_to_frame(struct device *dev,
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goto err_release_y;
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err = tegra_vde_attach_dmabuf(dev, src->cr_fd,
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src->cr_offset, csize,
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src->cr_offset, csize, SZ_256,
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&frame->cr_dmabuf_attachment,
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&frame->cr_addr,
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&frame->cr_sgt,
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@ -628,7 +636,7 @@ static int tegra_vde_attach_dmabufs_to_frame(struct device *dev,
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}
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err = tegra_vde_attach_dmabuf(dev, src->aux_fd,
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src->aux_offset, csize,
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src->aux_offset, csize, SZ_256,
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&frame->aux_dmabuf_attachment,
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&frame->aux_addr,
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&frame->aux_sgt,
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@ -677,21 +685,6 @@ static int tegra_vde_validate_frame(struct device *dev,
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return -EINVAL;
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}
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if (frame->y_offset & 0xFF) {
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dev_err(dev, "Bad y_offset 0x%X\n", frame->y_offset);
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return -EINVAL;
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}
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if (frame->cb_offset & 0xFF) {
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dev_err(dev, "Bad cb_offset 0x%X\n", frame->cb_offset);
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return -EINVAL;
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}
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if (frame->cr_offset & 0xFF) {
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dev_err(dev, "Bad cr_offset 0x%X\n", frame->cr_offset);
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return -EINVAL;
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}
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return 0;
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}
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@ -792,7 +785,8 @@ static int tegra_vde_ioctl_decode_h264(struct tegra_vde *vde,
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return ret;
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ret = tegra_vde_attach_dmabuf(dev, ctx.bitstream_data_fd,
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ctx.bitstream_data_offset, 0,
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ctx.bitstream_data_offset,
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SZ_16K, SZ_16K,
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&bitstream_data_dmabuf_attachment,
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&bitstream_data_addr,
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&bitstream_sgt,
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