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ethernet: cavium: octeon: Switch to using netdev_info(). 

Signed-off-by: Steven J. Hill <Steven.Hill@cavium.com>
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Steven J. Hill 2017-10-25 11:44:32 -05:00 committed by David S. Miller
parent f65163fed0
commit 1769af432a
1 changed files with 11 additions and 13 deletions
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24
drivers/net/ethernet/cavium/octeon/octeon_mgmt.c
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@ -705,14 +705,15 @@ static int octeon_mgmt_ioctl_hwtstamp(struct net_device *netdev,
u64 clock_comp = (NSEC_PER_SEC << 32) / octeon_get_io_clock_rate();
if (!ptp.s.ptp_en)
cvmx_write_csr(CVMX_MIO_PTP_CLOCK_COMP, clock_comp);
pr_info("PTP Clock: Using sclk reference at %lld Hz\n",
(NSEC_PER_SEC << 32) / clock_comp);
netdev_info(netdev,
"PTP Clock using sclk reference @ %lldHz\n",
(NSEC_PER_SEC << 32) / clock_comp);
} else {
/* The clock is already programmed to use a GPIO */
u64 clock_comp = cvmx_read_csr(CVMX_MIO_PTP_CLOCK_COMP);
pr_info("PTP Clock: Using GPIO %d at %lld Hz\n",
ptp.s.ext_clk_in,
(NSEC_PER_SEC << 32) / clock_comp);
netdev_info(netdev,
"PTP Clock using GPIO%d @ %lld Hz\n",
ptp.s.ext_clk_in, (NSEC_PER_SEC << 32) / clock_comp);
}
/* Enable the clock if it wasn't done already */
@ -926,14 +927,11 @@ static void octeon_mgmt_adjust_link(struct net_device *netdev)
spin_unlock_irqrestore(&p->lock, flags);
if (link_changed != 0) {
if (link_changed > 0) {
pr_info("%s: Link is up - %d/%s\n", netdev->name,
phydev->speed,
phydev->duplex == DUPLEX_FULL ?
"Full" : "Half");
} else {
pr_info("%s: Link is down\n", netdev->name);
}
if (link_changed > 0)
netdev_info(netdev, "Link is up - %d/%s\n",
phydev->speed, phydev->duplex == DUPLEX_FULL ? "Full" : "Half");
else
netdev_info(netdev, "Link is down\n");
}
}