clk: at91: clk-master: add support for parent_hw
Add support for parent_hw in master clock drivers. With this parent-child relation is described with pointers rather than strings making registration a bit faster. All the SoC based drivers that rely on clk-master were adapted to the new API change. The switch itself for SoCs will be done in subsequent patches. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20230615093227.576102-4-claudiu.beznea@microchip.com
This commit is contained in:
parent
00bd581b52
commit
171e502c6a
|
@ -140,7 +140,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
|
|||
parent_names[2] = "pllack";
|
||||
parent_names[3] = "pllbck";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
|
||||
parent_names,
|
||||
parent_names, NULL,
|
||||
&at91rm9200_master_layout,
|
||||
&rm9200_mck_characteristics,
|
||||
&rm9200_mck_lock);
|
||||
|
@ -148,7 +148,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
|
|||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres",
|
||||
"masterck_pres", NULL,
|
||||
&at91rm9200_master_layout,
|
||||
&rm9200_mck_characteristics,
|
||||
&rm9200_mck_lock, CLK_SET_RATE_GATE, 0);
|
||||
|
|
|
@ -416,7 +416,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
|
|||
parent_names[2] = "pllack";
|
||||
parent_names[3] = "pllbck";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
|
||||
parent_names,
|
||||
parent_names, NULL,
|
||||
&at91rm9200_master_layout,
|
||||
data->mck_characteristics,
|
||||
&at91sam9260_mck_lock);
|
||||
|
@ -424,7 +424,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
|
|||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres",
|
||||
"masterck_pres", NULL,
|
||||
&at91rm9200_master_layout,
|
||||
data->mck_characteristics,
|
||||
&at91sam9260_mck_lock,
|
||||
|
|
|
@ -156,7 +156,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
|
|||
parent_names[2] = "plladivck";
|
||||
parent_names[3] = "utmick";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
|
||||
parent_names,
|
||||
parent_names, NULL,
|
||||
&at91rm9200_master_layout,
|
||||
&mck_characteristics,
|
||||
&at91sam9g45_mck_lock);
|
||||
|
@ -164,7 +164,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
|
|||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres",
|
||||
"masterck_pres", NULL,
|
||||
&at91rm9200_master_layout,
|
||||
&mck_characteristics,
|
||||
&at91sam9g45_mck_lock,
|
||||
|
|
|
@ -183,7 +183,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
|
|||
parent_names[2] = "plladivck";
|
||||
parent_names[3] = "pllbck";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
|
||||
parent_names,
|
||||
parent_names, NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics,
|
||||
&at91sam9n12_mck_lock);
|
||||
|
@ -191,7 +191,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
|
|||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres",
|
||||
"masterck_pres", NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics,
|
||||
&at91sam9n12_mck_lock,
|
||||
|
|
|
@ -120,7 +120,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
|
|||
parent_names[2] = "pllack";
|
||||
parent_names[3] = "utmick";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
|
||||
parent_names,
|
||||
parent_names, NULL,
|
||||
&at91rm9200_master_layout,
|
||||
&sam9rl_mck_characteristics,
|
||||
&sam9rl_mck_lock);
|
||||
|
@ -128,7 +128,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
|
|||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres",
|
||||
"masterck_pres", NULL,
|
||||
&at91rm9200_master_layout,
|
||||
&sam9rl_mck_characteristics,
|
||||
&sam9rl_mck_lock, CLK_SET_RATE_GATE, 0);
|
||||
|
|
|
@ -204,14 +204,14 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
|
|||
parent_names[2] = "plladivck";
|
||||
parent_names[3] = "utmick";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
|
||||
parent_names,
|
||||
parent_names, NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres",
|
||||
"masterck_pres", NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock,
|
||||
CLK_SET_RATE_GATE, 0);
|
||||
|
|
|
@ -473,18 +473,19 @@ static struct clk_hw * __init
|
|||
at91_clk_register_master_internal(struct regmap *regmap,
|
||||
const char *name, int num_parents,
|
||||
const char **parent_names,
|
||||
struct clk_hw **parent_hws,
|
||||
const struct clk_master_layout *layout,
|
||||
const struct clk_master_characteristics *characteristics,
|
||||
const struct clk_ops *ops, spinlock_t *lock, u32 flags)
|
||||
{
|
||||
struct clk_master *master;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
struct clk_hw *hw;
|
||||
unsigned int mckr;
|
||||
unsigned long irqflags;
|
||||
int ret;
|
||||
|
||||
if (!name || !num_parents || !parent_names || !lock)
|
||||
if (!name || !num_parents || !(parent_names || parent_hws) || !lock)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
master = kzalloc(sizeof(*master), GFP_KERNEL);
|
||||
|
@ -493,7 +494,10 @@ at91_clk_register_master_internal(struct regmap *regmap,
|
|||
|
||||
init.name = name;
|
||||
init.ops = ops;
|
||||
init.parent_names = parent_names;
|
||||
if (parent_hws)
|
||||
init.parent_hws = (const struct clk_hw **)parent_hws;
|
||||
else
|
||||
init.parent_names = parent_names;
|
||||
init.num_parents = num_parents;
|
||||
init.flags = flags;
|
||||
|
||||
|
@ -527,12 +531,13 @@ struct clk_hw * __init
|
|||
at91_clk_register_master_pres(struct regmap *regmap,
|
||||
const char *name, int num_parents,
|
||||
const char **parent_names,
|
||||
struct clk_hw **parent_hws,
|
||||
const struct clk_master_layout *layout,
|
||||
const struct clk_master_characteristics *characteristics,
|
||||
spinlock_t *lock)
|
||||
{
|
||||
return at91_clk_register_master_internal(regmap, name, num_parents,
|
||||
parent_names, layout,
|
||||
parent_names, parent_hws, layout,
|
||||
characteristics,
|
||||
&master_pres_ops,
|
||||
lock, CLK_SET_RATE_GATE);
|
||||
|
@ -541,7 +546,7 @@ at91_clk_register_master_pres(struct regmap *regmap,
|
|||
struct clk_hw * __init
|
||||
at91_clk_register_master_div(struct regmap *regmap,
|
||||
const char *name, const char *parent_name,
|
||||
const struct clk_master_layout *layout,
|
||||
struct clk_hw *parent_hw, const struct clk_master_layout *layout,
|
||||
const struct clk_master_characteristics *characteristics,
|
||||
spinlock_t *lock, u32 flags, u32 safe_div)
|
||||
{
|
||||
|
@ -554,7 +559,8 @@ at91_clk_register_master_div(struct regmap *regmap,
|
|||
ops = &master_div_ops_chg;
|
||||
|
||||
hw = at91_clk_register_master_internal(regmap, name, 1,
|
||||
&parent_name, layout,
|
||||
parent_name ? &parent_name : NULL,
|
||||
parent_hw ? &parent_hw : NULL, layout,
|
||||
characteristics, ops,
|
||||
lock, flags);
|
||||
|
||||
|
@ -806,18 +812,19 @@ struct clk_hw * __init
|
|||
at91_clk_sama7g5_register_master(struct regmap *regmap,
|
||||
const char *name, int num_parents,
|
||||
const char **parent_names,
|
||||
struct clk_hw **parent_hws,
|
||||
u32 *mux_table,
|
||||
spinlock_t *lock, u8 id,
|
||||
bool critical, int chg_pid)
|
||||
{
|
||||
struct clk_master *master;
|
||||
struct clk_hw *hw;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
unsigned long flags;
|
||||
unsigned int val;
|
||||
int ret;
|
||||
|
||||
if (!name || !num_parents || !parent_names || !mux_table ||
|
||||
if (!name || !num_parents || !(parent_names || parent_hws) || !mux_table ||
|
||||
!lock || id > MASTER_MAX_ID)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
|
@ -827,7 +834,10 @@ at91_clk_sama7g5_register_master(struct regmap *regmap,
|
|||
|
||||
init.name = name;
|
||||
init.ops = &sama7g5_master_ops;
|
||||
init.parent_names = parent_names;
|
||||
if (parent_hws)
|
||||
init.parent_hws = (const struct clk_hw **)parent_hws;
|
||||
else
|
||||
init.parent_names = parent_names;
|
||||
init.num_parents = num_parents;
|
||||
init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
|
||||
if (chg_pid >= 0)
|
||||
|
|
|
@ -420,12 +420,12 @@ of_at91_clk_master_setup(struct device_node *np,
|
|||
return;
|
||||
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", num_parents,
|
||||
parent_names, layout,
|
||||
parent_names, NULL, layout,
|
||||
characteristics, &mck_lock);
|
||||
if (IS_ERR(hw))
|
||||
goto out_free_characteristics;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, name, "masterck_pres",
|
||||
hw = at91_clk_register_master_div(regmap, name, "masterck_pres", NULL,
|
||||
layout, characteristics,
|
||||
&mck_lock, CLK_SET_RATE_GATE, 0);
|
||||
if (IS_ERR(hw))
|
||||
|
|
|
@ -177,13 +177,14 @@ at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name,
|
|||
struct clk_hw * __init
|
||||
at91_clk_register_master_pres(struct regmap *regmap, const char *name,
|
||||
int num_parents, const char **parent_names,
|
||||
struct clk_hw **parent_hws,
|
||||
const struct clk_master_layout *layout,
|
||||
const struct clk_master_characteristics *characteristics,
|
||||
spinlock_t *lock);
|
||||
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_master_div(struct regmap *regmap, const char *name,
|
||||
const char *parent_names,
|
||||
const char *parent_names, struct clk_hw *parent_hw,
|
||||
const struct clk_master_layout *layout,
|
||||
const struct clk_master_characteristics *characteristics,
|
||||
spinlock_t *lock, u32 flags, u32 safe_div);
|
||||
|
@ -191,7 +192,8 @@ at91_clk_register_master_div(struct regmap *regmap, const char *name,
|
|||
struct clk_hw * __init
|
||||
at91_clk_sama7g5_register_master(struct regmap *regmap,
|
||||
const char *name, int num_parents,
|
||||
const char **parent_names, u32 *mux_table,
|
||||
const char **parent_names,
|
||||
struct clk_hw **parent_hws, u32 *mux_table,
|
||||
spinlock_t *lock, u8 id, bool critical,
|
||||
int chg_pid);
|
||||
|
||||
|
|
|
@ -280,13 +280,13 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
|
|||
parent_names[1] = "mainck";
|
||||
parent_names[2] = "pllack_divck";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 3,
|
||||
parent_names, &sam9x60_master_layout,
|
||||
parent_names, NULL, &sam9x60_master_layout,
|
||||
&mck_characteristics, &mck_lock);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres", &sam9x60_master_layout,
|
||||
"masterck_pres", NULL, &sam9x60_master_layout,
|
||||
&mck_characteristics, &mck_lock,
|
||||
CLK_SET_RATE_GATE, 0);
|
||||
if (IS_ERR(hw))
|
||||
|
|
|
@ -260,14 +260,14 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
|
|||
parent_names[2] = "plladivck";
|
||||
parent_names[3] = "utmick";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
|
||||
parent_names,
|
||||
parent_names, NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres",
|
||||
"masterck_pres", NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock,
|
||||
CLK_SET_RATE_GATE, 0);
|
||||
|
|
|
@ -183,14 +183,14 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
|
|||
parent_names[2] = "plladivck";
|
||||
parent_names[3] = "utmick";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
|
||||
parent_names,
|
||||
parent_names, NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres",
|
||||
"masterck_pres", NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock,
|
||||
CLK_SET_RATE_GATE, 0);
|
||||
|
|
|
@ -198,14 +198,14 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
|
|||
parent_names[2] = "plladivck";
|
||||
parent_names[3] = "utmick";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
|
||||
parent_names,
|
||||
parent_names, NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres",
|
||||
"masterck_pres", NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock,
|
||||
CLK_SET_RATE_GATE, 0);
|
||||
|
|
|
@ -995,7 +995,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
|
|||
}
|
||||
|
||||
parent_names[0] = "cpupll_divpmcck";
|
||||
hw = at91_clk_register_master_div(regmap, "mck0", "cpupll_divpmcck",
|
||||
hw = at91_clk_register_master_div(regmap, "mck0", "cpupll_divpmcck", NULL,
|
||||
&mck0_layout, &mck0_characteristics,
|
||||
&pmc_mck0_lock, CLK_GET_RATE_NOCACHE, 5);
|
||||
if (IS_ERR(hw))
|
||||
|
@ -1022,7 +1022,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
|
|||
sama7g5_mckx[i].ep_count);
|
||||
|
||||
hw = at91_clk_sama7g5_register_master(regmap, sama7g5_mckx[i].n,
|
||||
num_parents, parent_names, mux_table,
|
||||
num_parents, parent_names, NULL, mux_table,
|
||||
&pmc_mckX_lock, sama7g5_mckx[i].id,
|
||||
sama7g5_mckx[i].c,
|
||||
sama7g5_mckx[i].ep_chg_id);
|
||||
|
|
Loading…
Reference in New Issue