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drm/i915: Add engine scratch register to live_lrc_fixed 

General purpose registers are per engine and
in a fixed location. Add to live_lrc_fixed.

Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200424214841.28076-1-mika.kuoppala@linux.intel.com
This commit is contained in:
Mika Kuoppala 2020-04-25 00:48:38 +03:00 committed by Chris Wilson
parent 9669a50799
commit 168c6d231b
2 changed files with 17 additions and 0 deletions
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12
drivers/gpu/drm/i915/gt/intel_lrc.c
View File

@ -250,6 +250,18 @@ static int lrc_ring_mi_mode(const struct intel_engine_cs *engine)
return -1;
}
static int lrc_ring_gpr0(const struct intel_engine_cs *engine)
{
if (INTEL_GEN(engine->i915) >= 12)
return 0x74;
else if (INTEL_GEN(engine->i915) >= 9)
return 0x68;
else if (engine->class == RENDER_CLASS)
return 0xd8;
else
return -1;
}
static int lrc_ring_wa_bb_per_ctx(const struct intel_engine_cs *engine)
{
if (INTEL_GEN(engine->i915) >= 12)

5
drivers/gpu/drm/i915/gt/selftest_lrc.c
View File

@ -4613,6 +4613,11 @@ static int live_lrc_fixed(void *arg)
CTX_TIMESTAMP - 1,
"RING_CTX_TIMESTAMP"
},
{
i915_mmio_reg_offset(GEN8_RING_CS_GPR(engine->mmio_base, 0)),
lrc_ring_gpr0(engine),
"RING_CS_GPR0"
},
{ },
}, *t;
u32 *hw;