i.MX SoC changes for 4.15:
- A series from Marco Franchi from to clean up build warnings see with W=1 in arch/arm/mach-imx/. - Move i.MX6 speed grading check from i.MX platform code to cpufreq driver. The patch is suggested by cpufreq folks to go through arm-soc tree. - Enable cpuidle support on i.MX6DL starting from IMX_CHIP_REVISION_1_1. - Constify platform_suspend_ops for MXS platform. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJZ7yAPAAoJEFBXWFqHsHzO2/AH/jLMgZBJgOG/EhKeocAcvuGH UO6ST/Cj+R/2X0Yof4toiCfksflsDj8rGdGMchNjUsoPdApHcsyjJgGrDfo0j4uV 3eBn9tw0YmgEIA68R5QyTXbmm79cq0JmiJtzKMoKkX+fzNjrkNur0gfZYkiNNL+z DEEufvv2HbTbgqTVKK+/DjDySsN/Ez8vVZwJMNY43zx6T4RB7TSvsAyRa6nTAOTM Em4pC28IztGLk4uZYJspsKS4qx5FK9kskheUpMqbv1ra6PwHslYklvswSD36kPcw xpAFQ35XuAGpsvjqgXN+4ACL8H7SyTXEZwbHbiJVps86S5C4FyOvNUfm1QIPqzs= =tPmd -----END PGP SIGNATURE----- Merge tag 'imx-soc-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc Pull "i.MX SoC changes for 4.15" from Shawn Guo: - A series from Marco Franchi from to clean up build warnings see with W=1 in arch/arm/mach-imx/. - Move i.MX6 speed grading check from i.MX platform code to cpufreq driver. The patch is suggested by cpufreq folks to go through arm-soc tree. - Enable cpuidle support on i.MX6DL starting from IMX_CHIP_REVISION_1_1. - Constify platform_suspend_ops for MXS platform. * tag 'imx-soc-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: cpufreq: imx6q: Move speed grading check to cpufreq driver ARM: imx: Enable cpuidle for i.MX6DL starting at 1.1 ARM: imx: mach-mx31lite: Make mx31lite_map_io static ARM: imx: cpuidle-imx5: Include "cpuidle.h" header file ARM: imx: 3ds-debugboard: Include "3ds_debugboard.h" header file ARM: imx: imx31moboard: Include "board-mx31moboard.h" header file ARM: mxs: constify platform_suspend_ops
This commit is contained in:
commit
16511ee20b
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@ -20,7 +20,7 @@
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#include <linux/smsc911x.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/fixed.h>
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#include "3ds_debugboard.h"
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#include "hardware.h"
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/* LAN9217 ethernet base address */
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@ -9,6 +9,7 @@
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#include <linux/cpuidle.h>
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#include <linux/module.h>
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#include <asm/system_misc.h>
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#include "cpuidle.h"
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static int imx5_cpuidle_enter(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int index)
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@ -286,101 +286,20 @@ static void __init imx6q_init_machine(void)
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imx6q_axi_init();
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}
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#define OCOTP_CFG3 0x440
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#define OCOTP_CFG3_SPEED_SHIFT 16
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#define OCOTP_CFG3_SPEED_1P2GHZ 0x3
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#define OCOTP_CFG3_SPEED_996MHZ 0x2
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#define OCOTP_CFG3_SPEED_852MHZ 0x1
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static void __init imx6q_opp_check_speed_grading(struct device *cpu_dev)
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{
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struct device_node *np;
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void __iomem *base;
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u32 val;
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np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-ocotp");
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if (!np) {
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pr_warn("failed to find ocotp node\n");
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return;
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}
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base = of_iomap(np, 0);
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if (!base) {
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pr_warn("failed to map ocotp\n");
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goto put_node;
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}
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/*
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* SPEED_GRADING[1:0] defines the max speed of ARM:
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* 2b'11: 1200000000Hz;
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* 2b'10: 996000000Hz;
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* 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
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* 2b'00: 792000000Hz;
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* We need to set the max speed of ARM according to fuse map.
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*/
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val = readl_relaxed(base + OCOTP_CFG3);
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val >>= OCOTP_CFG3_SPEED_SHIFT;
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val &= 0x3;
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if ((val != OCOTP_CFG3_SPEED_1P2GHZ) && cpu_is_imx6q())
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if (dev_pm_opp_disable(cpu_dev, 1200000000))
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pr_warn("failed to disable 1.2 GHz OPP\n");
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if (val < OCOTP_CFG3_SPEED_996MHZ)
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if (dev_pm_opp_disable(cpu_dev, 996000000))
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pr_warn("failed to disable 996 MHz OPP\n");
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if (cpu_is_imx6q()) {
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if (val != OCOTP_CFG3_SPEED_852MHZ)
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if (dev_pm_opp_disable(cpu_dev, 852000000))
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pr_warn("failed to disable 852 MHz OPP\n");
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}
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iounmap(base);
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put_node:
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of_node_put(np);
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}
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static void __init imx6q_opp_init(void)
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{
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struct device_node *np;
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struct device *cpu_dev = get_cpu_device(0);
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if (!cpu_dev) {
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pr_warn("failed to get cpu0 device\n");
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return;
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}
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np = of_node_get(cpu_dev->of_node);
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if (!np) {
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pr_warn("failed to find cpu0 node\n");
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return;
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}
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if (dev_pm_opp_of_add_table(cpu_dev)) {
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pr_warn("failed to init OPP table\n");
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goto put_node;
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}
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imx6q_opp_check_speed_grading(cpu_dev);
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put_node:
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of_node_put(np);
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}
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static struct platform_device imx6q_cpufreq_pdev = {
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.name = "imx6q-cpufreq",
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};
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static void __init imx6q_init_late(void)
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{
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/*
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* WAIT mode is broken on TO 1.0 and 1.1, so there is no point
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* to run cpuidle on them.
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* WAIT mode is broken on imx6 Dual/Quad revision 1.0 and 1.1 so
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* there is no point to run cpuidle on them.
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*
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* It does work on imx6 Solo/DualLite starting from 1.1
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*/
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if (imx_get_soc_revision() > IMX_CHIP_REVISION_1_1)
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if ((cpu_is_imx6q() && imx_get_soc_revision() > IMX_CHIP_REVISION_1_1) ||
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(cpu_is_imx6dl() && imx_get_soc_revision() > IMX_CHIP_REVISION_1_0))
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imx6q_cpuidle_init();
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if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) {
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imx6q_opp_init();
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platform_device_register(&imx6q_cpufreq_pdev);
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}
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if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
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platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
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}
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static void __init imx6q_map_io(void)
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@ -245,7 +245,7 @@ static struct map_desc mx31lite_io_desc[] __initdata = {
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/*
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* Set up static virtual mappings.
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*/
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void __init mx31lite_map_io(void)
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static void __init mx31lite_map_io(void)
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{
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mx31_map_io();
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iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
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@ -22,6 +22,7 @@
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#include <linux/usb/otg.h>
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#include "board-mx31moboard.h"
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#include "common.h"
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#include "devices-imx31.h"
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#include "ehci.h"
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#include <linux/usb/otg.h>
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#include "board-mx31moboard.h"
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#include "common.h"
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#include "devices-imx31.h"
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#include "ehci.h"
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@ -30,7 +30,7 @@ static int mxs_suspend_enter(suspend_state_t state)
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return 0;
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}
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static struct platform_suspend_ops mxs_suspend_ops = {
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static const struct platform_suspend_ops mxs_suspend_ops = {
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.enter = mxs_suspend_enter,
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.valid = suspend_valid_only_mem,
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};
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@ -12,6 +12,7 @@
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/pm_opp.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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.suspend = cpufreq_generic_suspend,
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};
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#define OCOTP_CFG3 0x440
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#define OCOTP_CFG3_SPEED_SHIFT 16
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#define OCOTP_CFG3_SPEED_1P2GHZ 0x3
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#define OCOTP_CFG3_SPEED_996MHZ 0x2
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#define OCOTP_CFG3_SPEED_852MHZ 0x1
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static void imx6q_opp_check_speed_grading(struct device *dev)
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{
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struct device_node *np;
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void __iomem *base;
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u32 val;
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np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-ocotp");
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if (!np)
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return;
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base = of_iomap(np, 0);
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if (!base) {
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dev_err(dev, "failed to map ocotp\n");
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goto put_node;
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}
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/*
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* SPEED_GRADING[1:0] defines the max speed of ARM:
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* 2b'11: 1200000000Hz;
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* 2b'10: 996000000Hz;
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* 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
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* 2b'00: 792000000Hz;
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* We need to set the max speed of ARM according to fuse map.
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*/
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val = readl_relaxed(base + OCOTP_CFG3);
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val >>= OCOTP_CFG3_SPEED_SHIFT;
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val &= 0x3;
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if ((val != OCOTP_CFG3_SPEED_1P2GHZ) &&
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of_machine_is_compatible("fsl,imx6q"))
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if (dev_pm_opp_disable(dev, 1200000000))
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dev_warn(dev, "failed to disable 1.2GHz OPP\n");
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if (val < OCOTP_CFG3_SPEED_996MHZ)
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if (dev_pm_opp_disable(dev, 996000000))
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dev_warn(dev, "failed to disable 996MHz OPP\n");
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if (of_machine_is_compatible("fsl,imx6q")) {
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if (val != OCOTP_CFG3_SPEED_852MHZ)
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if (dev_pm_opp_disable(dev, 852000000))
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dev_warn(dev, "failed to disable 852MHz OPP\n");
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}
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iounmap(base);
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put_node:
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of_node_put(np);
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}
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static int imx6q_cpufreq_probe(struct platform_device *pdev)
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{
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struct device_node *np;
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goto put_reg;
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}
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/*
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* We expect an OPP table supplied by platform.
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* Just, incase the platform did not supply the OPP
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* table, it will try to get it.
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*/
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ret = dev_pm_opp_of_add_table(cpu_dev);
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if (ret < 0) {
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dev_err(cpu_dev, "failed to init OPP table: %d\n", ret);
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goto put_reg;
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}
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imx6q_opp_check_speed_grading(cpu_dev);
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/* Because we have added the OPPs here, we must free them */
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free_opp = true;
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num = dev_pm_opp_get_opp_count(cpu_dev);
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if (num < 0) {
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ret = dev_pm_opp_of_add_table(cpu_dev);
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if (ret < 0) {
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dev_err(cpu_dev, "failed to init OPP table: %d\n", ret);
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goto put_reg;
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}
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/* Because we have added the OPPs here, we must free them */
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free_opp = true;
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num = dev_pm_opp_get_opp_count(cpu_dev);
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if (num < 0) {
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ret = num;
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dev_err(cpu_dev, "no OPP table is found: %d\n", ret);
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goto out_free_opp;
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}
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ret = num;
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dev_err(cpu_dev, "no OPP table is found: %d\n", ret);
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goto out_free_opp;
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}
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ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
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