arm: bpf: eliminate zero extension code-gen
Cc: Shubham Bansal <illusionist.neo@gmail.com> Signed-off-by: Jiong Wang <jiong.wang@netronome.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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@ -736,6 +736,7 @@ static inline void emit_a32_alu_r64(const bool is64, const s8 dst[],
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/* ALU operation */
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emit_alu_r(rd[1], rs, true, false, op, ctx);
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if (!ctx->prog->aux->verifier_zext)
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emit_a32_mov_i(rd[0], 0, ctx);
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}
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@ -758,6 +759,7 @@ static inline void emit_a32_mov_r64(const bool is64, const s8 dst[],
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struct jit_ctx *ctx) {
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if (!is64) {
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emit_a32_mov_r(dst_lo, src_lo, ctx);
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if (!ctx->prog->aux->verifier_zext)
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/* Zero out high 4 bytes */
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emit_a32_mov_i(dst_hi, 0, ctx);
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} else if (__LINUX_ARM_ARCH__ < 6 &&
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@ -1060,16 +1062,19 @@ static inline void emit_ldx_r(const s8 dst[], const s8 src,
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case BPF_B:
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/* Load a Byte */
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emit(ARM_LDRB_I(rd[1], rm, off), ctx);
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if (!ctx->prog->aux->verifier_zext)
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emit_a32_mov_i(rd[0], 0, ctx);
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break;
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case BPF_H:
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/* Load a HalfWord */
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emit(ARM_LDRH_I(rd[1], rm, off), ctx);
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if (!ctx->prog->aux->verifier_zext)
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emit_a32_mov_i(rd[0], 0, ctx);
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break;
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case BPF_W:
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/* Load a Word */
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emit(ARM_LDR_I(rd[1], rm, off), ctx);
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if (!ctx->prog->aux->verifier_zext)
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emit_a32_mov_i(rd[0], 0, ctx);
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break;
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case BPF_DW:
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@ -1359,6 +1364,11 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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case BPF_ALU64 | BPF_MOV | BPF_X:
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switch (BPF_SRC(code)) {
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case BPF_X:
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if (imm == 1) {
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/* Special mov32 for zext */
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emit_a32_mov_i(dst_hi, 0, ctx);
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break;
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}
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emit_a32_mov_r64(is64, dst, src, ctx);
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break;
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case BPF_K:
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@ -1438,6 +1448,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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}
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emit_udivmod(rd_lo, rd_lo, rt, ctx, BPF_OP(code));
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arm_bpf_put_reg32(dst_lo, rd_lo, ctx);
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if (!ctx->prog->aux->verifier_zext)
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emit_a32_mov_i(dst_hi, 0, ctx);
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break;
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case BPF_ALU64 | BPF_DIV | BPF_K:
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@ -1453,6 +1464,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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return -EINVAL;
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if (imm)
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emit_a32_alu_i(dst_lo, imm, ctx, BPF_OP(code));
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if (!ctx->prog->aux->verifier_zext)
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emit_a32_mov_i(dst_hi, 0, ctx);
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break;
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/* dst = dst << imm */
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@ -1488,6 +1500,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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/* dst = ~dst */
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case BPF_ALU | BPF_NEG:
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emit_a32_alu_i(dst_lo, 0, ctx, BPF_OP(code));
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if (!ctx->prog->aux->verifier_zext)
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emit_a32_mov_i(dst_hi, 0, ctx);
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break;
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/* dst = ~dst (64 bit) */
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@ -1544,10 +1557,12 @@ emit_bswap_uxt:
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#else /* ARMv6+ */
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emit(ARM_UXTH(rd[1], rd[1]), ctx);
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#endif
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if (!ctx->prog->aux->verifier_zext)
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emit(ARM_EOR_R(rd[0], rd[0], rd[0]), ctx);
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break;
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case 32:
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/* zero-extend 32 bits into 64 bits */
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if (!ctx->prog->aux->verifier_zext)
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emit(ARM_EOR_R(rd[0], rd[0], rd[0]), ctx);
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break;
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case 64:
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@ -1838,6 +1853,11 @@ void bpf_jit_compile(struct bpf_prog *prog)
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/* Nothing to do here. We support Internal BPF. */
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}
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bool bpf_jit_needs_zext(void)
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{
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return true;
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}
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struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
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{
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struct bpf_prog *tmp, *orig_prog = prog;
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