PCI: mvebu: Properly initialize vendor, device and revision of emulated bridge
With this change also PCI vendor id is read from mvebu registers. Link: https://lore.kernel.org/r/20220104153529.31647-9-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
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@ -712,13 +712,14 @@ static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port)
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{
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{
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unsigned int bridge_flags = PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD;
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unsigned int bridge_flags = PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD;
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struct pci_bridge_emul *bridge = &port->bridge;
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struct pci_bridge_emul *bridge = &port->bridge;
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u32 dev_id = mvebu_readl(port, PCIE_DEV_ID_OFF);
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u32 dev_rev = mvebu_readl(port, PCIE_DEV_REV_OFF);
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u32 pcie_cap = mvebu_readl(port, PCIE_CAP_PCIEXP);
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u32 pcie_cap = mvebu_readl(port, PCIE_CAP_PCIEXP);
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u8 pcie_cap_ver = ((pcie_cap >> 16) & PCI_EXP_FLAGS_VERS);
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u8 pcie_cap_ver = ((pcie_cap >> 16) & PCI_EXP_FLAGS_VERS);
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bridge->conf.vendor = PCI_VENDOR_ID_MARVELL;
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bridge->conf.vendor = cpu_to_le16(dev_id & 0xffff);
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bridge->conf.device = mvebu_readl(port, PCIE_DEV_ID_OFF) >> 16;
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bridge->conf.device = cpu_to_le16(dev_id >> 16);
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bridge->conf.class_revision =
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bridge->conf.class_revision = cpu_to_le32(dev_rev & 0xff);
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mvebu_readl(port, PCIE_DEV_REV_OFF) & 0xff;
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if (mvebu_has_ioport(port)) {
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if (mvebu_has_ioport(port)) {
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/* We support 32 bits I/O addressing */
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/* We support 32 bits I/O addressing */
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