mtd: rawnand: ingenic: Separate top-level and SoC specific code
The ingenic-nand driver uses an API provided by the jz4780-bch driver. This makes it difficult to support other SoCs in the jz4780-bch driver. To work around this, we separate the API functions from the SoC-specific code, so that these API functions are SoC-agnostic. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This commit is contained in:
Paul Cercueil
Miquel Raynal
parent
d74fd06f44
commit
15de8c6efd
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@ -11,3 +11,20 @@ config MTD_NAND_JZ4780
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help
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Enables support for NAND Flash connected to the NEMC on JZ4780 SoC
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based boards, using the BCH controller for hardware error correction.
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if MTD_NAND_JZ4780
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config MTD_NAND_INGENIC_ECC
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tristate
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config MTD_NAND_JZ4780_BCH
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tristate "Hardware BCH support for JZ4780 SoC"
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select MTD_NAND_INGENIC_ECC
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help
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Enable this driver to support the BCH error-correction hardware
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present on the JZ4780 SoC from Ingenic.
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This driver can also be built as a module. If so, the module
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will be called jz4780-bch.
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endif # MTD_NAND_JZ4780
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@ -1,2 +1,5 @@
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obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o
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obj-$(CONFIG_MTD_NAND_JZ4780) += ingenic_nand.o jz4780_bch.o
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obj-$(CONFIG_MTD_NAND_JZ4780) += ingenic_nand.o
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obj-$(CONFIG_MTD_NAND_INGENIC_ECC) += ingenic_ecc.o
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obj-$(CONFIG_MTD_NAND_JZ4780_BCH) += jz4780_bch.o
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@ -0,0 +1,156 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* JZ47xx ECC common code
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*
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* Copyright (c) 2015 Imagination Technologies
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* Author: Alex Smith <alex.smith@imgtec.com>
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*/
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#include <linux/clk.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include "ingenic_ecc.h"
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/**
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* ingenic_ecc_calculate() - calculate ECC for a data buffer
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* @ecc: ECC device.
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* @params: ECC parameters.
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* @buf: input buffer with raw data.
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* @ecc_code: output buffer with ECC.
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*
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* Return: 0 on success, -ETIMEDOUT if timed out while waiting for ECC
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* controller.
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*/
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int ingenic_ecc_calculate(struct ingenic_ecc *ecc,
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struct ingenic_ecc_params *params,
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const u8 *buf, u8 *ecc_code)
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{
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return ecc->ops->calculate(ecc, params, buf, ecc_code);
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}
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EXPORT_SYMBOL(ingenic_ecc_calculate);
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/**
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* ingenic_ecc_correct() - detect and correct bit errors
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* @ecc: ECC device.
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* @params: ECC parameters.
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* @buf: raw data read from the chip.
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* @ecc_code: ECC read from the chip.
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*
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* Given the raw data and the ECC read from the NAND device, detects and
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* corrects errors in the data.
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*
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* Return: the number of bit errors corrected, -EBADMSG if there are too many
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* errors to correct or -ETIMEDOUT if we timed out waiting for the controller.
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*/
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int ingenic_ecc_correct(struct ingenic_ecc *ecc,
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struct ingenic_ecc_params *params,
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u8 *buf, u8 *ecc_code)
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{
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return ecc->ops->correct(ecc, params, buf, ecc_code);
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}
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EXPORT_SYMBOL(ingenic_ecc_correct);
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/**
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* ingenic_ecc_get() - get the ECC controller device
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* @np: ECC device tree node.
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*
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* Gets the ECC controller device from the specified device tree node. The
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* device must be released with ingenic_ecc_release() when it is no longer being
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* used.
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*
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* Return: a pointer to ingenic_ecc, errors are encoded into the pointer.
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* PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised yet.
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*/
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static struct ingenic_ecc *ingenic_ecc_get(struct device_node *np)
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{
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struct platform_device *pdev;
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struct ingenic_ecc *ecc;
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pdev = of_find_device_by_node(np);
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if (!pdev || !platform_get_drvdata(pdev))
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return ERR_PTR(-EPROBE_DEFER);
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get_device(&pdev->dev);
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ecc = platform_get_drvdata(pdev);
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clk_prepare_enable(ecc->clk);
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return ecc;
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}
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/**
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* of_ingenic_ecc_get() - get the ECC controller from a DT node
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* @of_node: the node that contains a bch-controller property.
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*
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* Get the bch-controller property from the given device tree
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* node and pass it to ingenic_ecc_get to do the work.
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*
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* Return: a pointer to ingenic_ecc, errors are encoded into the pointer.
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* PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised yet.
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*/
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struct ingenic_ecc *of_ingenic_ecc_get(struct device_node *of_node)
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{
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struct ingenic_ecc *ecc = NULL;
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struct device_node *np;
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np = of_parse_phandle(of_node, "ingenic,bch-controller", 0);
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if (np) {
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ecc = ingenic_ecc_get(np);
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of_node_put(np);
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}
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return ecc;
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}
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EXPORT_SYMBOL(of_ingenic_ecc_get);
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/**
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* ingenic_ecc_release() - release the ECC controller device
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* @ecc: ECC device.
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*/
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void ingenic_ecc_release(struct ingenic_ecc *ecc)
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{
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clk_disable_unprepare(ecc->clk);
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put_device(ecc->dev);
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}
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EXPORT_SYMBOL(ingenic_ecc_release);
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int ingenic_ecc_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct ingenic_ecc *ecc;
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struct resource *res;
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ecc = devm_kzalloc(dev, sizeof(*ecc), GFP_KERNEL);
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if (!ecc)
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return -ENOMEM;
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ecc->ops = device_get_match_data(dev);
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if (!ecc->ops)
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return -EINVAL;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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ecc->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(ecc->base))
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return PTR_ERR(ecc->base);
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ecc->ops->disable(ecc);
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ecc->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(ecc->clk)) {
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dev_err(dev, "failed to get clock: %ld\n", PTR_ERR(ecc->clk));
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return PTR_ERR(ecc->clk);
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}
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mutex_init(&ecc->lock);
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ecc->dev = dev;
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platform_set_drvdata(pdev, ecc);
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return 0;
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}
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EXPORT_SYMBOL(ingenic_ecc_probe);
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MODULE_LICENSE("GPL v2");
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@ -0,0 +1,83 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __DRIVERS_MTD_NAND_INGENIC_ECC_INTERNAL_H__
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#define __DRIVERS_MTD_NAND_INGENIC_ECC_INTERNAL_H__
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#include <linux/compiler_types.h>
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#include <linux/err.h>
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#include <linux/mutex.h>
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#include <linux/types.h>
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#include <uapi/asm-generic/errno-base.h>
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struct clk;
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struct device;
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struct ingenic_ecc;
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struct platform_device;
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/**
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* struct ingenic_ecc_params - ECC parameters
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* @size: data bytes per ECC step.
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* @bytes: ECC bytes per step.
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* @strength: number of correctable bits per ECC step.
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*/
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struct ingenic_ecc_params {
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int size;
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int bytes;
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int strength;
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};
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#if IS_ENABLED(CONFIG_MTD_NAND_INGENIC_ECC)
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int ingenic_ecc_calculate(struct ingenic_ecc *ecc,
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struct ingenic_ecc_params *params,
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const u8 *buf, u8 *ecc_code);
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int ingenic_ecc_correct(struct ingenic_ecc *ecc,
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struct ingenic_ecc_params *params, u8 *buf,
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u8 *ecc_code);
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void ingenic_ecc_release(struct ingenic_ecc *ecc);
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struct ingenic_ecc *of_ingenic_ecc_get(struct device_node *np);
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#else /* CONFIG_MTD_NAND_INGENIC_ECC */
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int ingenic_ecc_calculate(struct ingenic_ecc *ecc,
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struct ingenic_ecc_params *params,
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const u8 *buf, u8 *ecc_code)
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{
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return -ENODEV;
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}
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int ingenic_ecc_correct(struct ingenic_ecc *ecc,
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struct ingenic_ecc_params *params, u8 *buf,
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u8 *ecc_code)
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{
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return -ENODEV;
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}
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void ingenic_ecc_release(struct ingenic_ecc *ecc)
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{
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}
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struct ingenic_ecc *of_ingenic_ecc_get(struct device_node *np)
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{
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return ERR_PTR(-ENODEV);
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}
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#endif /* CONFIG_MTD_NAND_INGENIC_ECC */
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struct ingenic_ecc_ops {
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void (*disable)(struct ingenic_ecc *ecc);
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int (*calculate)(struct ingenic_ecc *ecc,
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struct ingenic_ecc_params *params,
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const u8 *buf, u8 *ecc_code);
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int (*correct)(struct ingenic_ecc *ecc,
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struct ingenic_ecc_params *params,
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u8 *buf, u8 *ecc_code);
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};
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struct ingenic_ecc {
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struct device *dev;
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const struct ingenic_ecc_ops *ops;
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void __iomem *base;
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struct clk *clk;
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struct mutex lock;
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};
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int ingenic_ecc_probe(struct platform_device *pdev);
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#endif /* __DRIVERS_MTD_NAND_INGENIC_ECC_INTERNAL_H__ */
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@ -22,7 +22,7 @@
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#include <linux/jz4780-nemc.h>
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#include "jz4780_bch.h"
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#include "ingenic_ecc.h"
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#define DRV_NAME "ingenic-nand"
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@ -40,7 +40,7 @@ struct ingenic_nand_cs {
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struct ingenic_nfc {
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struct device *dev;
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struct jz4780_bch *bch;
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struct ingenic_ecc *ecc;
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struct nand_controller controller;
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unsigned int num_banks;
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struct list_head chips;
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@ -124,11 +124,11 @@ static int ingenic_nand_ecc_calculate(struct nand_chip *chip, const u8 *dat,
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{
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struct ingenic_nand *nand = to_ingenic_nand(nand_to_mtd(chip));
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struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller);
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struct jz4780_bch_params params;
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struct ingenic_ecc_params params;
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/*
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* Don't need to generate the ECC when reading, BCH does it for us as
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* part of decoding/correction.
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* Don't need to generate the ECC when reading, the ECC engine does it
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* for us as part of decoding/correction.
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*/
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if (nand->reading)
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return 0;
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@ -137,7 +137,7 @@ static int ingenic_nand_ecc_calculate(struct nand_chip *chip, const u8 *dat,
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params.bytes = nand->chip.ecc.bytes;
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params.strength = nand->chip.ecc.strength;
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return jz4780_bch_calculate(nfc->bch, ¶ms, dat, ecc_code);
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return ingenic_ecc_calculate(nfc->ecc, ¶ms, dat, ecc_code);
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}
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static int ingenic_nand_ecc_correct(struct nand_chip *chip, u8 *dat,
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@ -145,13 +145,13 @@ static int ingenic_nand_ecc_correct(struct nand_chip *chip, u8 *dat,
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{
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struct ingenic_nand *nand = to_ingenic_nand(nand_to_mtd(chip));
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struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller);
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struct jz4780_bch_params params;
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struct ingenic_ecc_params params;
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params.size = nand->chip.ecc.size;
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params.bytes = nand->chip.ecc.bytes;
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params.strength = nand->chip.ecc.strength;
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return jz4780_bch_correct(nfc->bch, ¶ms, dat, read_ecc);
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return ingenic_ecc_correct(nfc->ecc, ¶ms, dat, read_ecc);
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}
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static int ingenic_nand_attach_chip(struct nand_chip *chip)
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@ -165,8 +165,8 @@ static int ingenic_nand_attach_chip(struct nand_chip *chip)
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switch (chip->ecc.mode) {
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case NAND_ECC_HW:
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if (!nfc->bch) {
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dev_err(nfc->dev, "HW BCH selected, but BCH controller not found\n");
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if (!nfc->ecc) {
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dev_err(nfc->dev, "HW ECC selected, but ECC controller not found\n");
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return -ENODEV;
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}
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@ -176,7 +176,7 @@ static int ingenic_nand_attach_chip(struct nand_chip *chip)
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/* fall through */
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case NAND_ECC_SOFT:
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dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n",
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(nfc->bch) ? "hardware BCH" : "software ECC",
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(nfc->ecc) ? "hardware ECC" : "software ECC",
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chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
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break;
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case NAND_ECC_NONE:
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@ -354,12 +354,12 @@ static int ingenic_nand_probe(struct platform_device *pdev)
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return -ENOMEM;
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/*
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* Check for BCH HW before we call nand_scan_ident, to prevent us from
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* having to call it again if the BCH driver returns -EPROBE_DEFER.
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* Check for ECC HW before we call nand_scan_ident, to prevent us from
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* having to call it again if the ECC driver returns -EPROBE_DEFER.
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*/
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nfc->bch = of_jz4780_bch_get(dev->of_node);
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if (IS_ERR(nfc->bch))
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return PTR_ERR(nfc->bch);
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nfc->ecc = of_ingenic_ecc_get(dev->of_node);
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if (IS_ERR(nfc->ecc))
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return PTR_ERR(nfc->ecc);
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nfc->dev = dev;
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nfc->num_banks = num_banks;
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@ -369,8 +369,8 @@ static int ingenic_nand_probe(struct platform_device *pdev)
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ret = ingenic_nand_init_chips(nfc, pdev);
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if (ret) {
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if (nfc->bch)
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jz4780_bch_release(nfc->bch);
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if (nfc->ecc)
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ingenic_ecc_release(nfc->ecc);
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return ret;
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}
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@ -382,8 +382,8 @@ static int ingenic_nand_remove(struct platform_device *pdev)
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{
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struct ingenic_nfc *nfc = platform_get_drvdata(pdev);
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if (nfc->bch)
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jz4780_bch_release(nfc->bch);
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if (nfc->ecc)
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ingenic_ecc_release(nfc->ecc);
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ingenic_nand_cleanup_chips(nfc);
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* JZ4780 BCH controller
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* JZ4780 BCH controller driver
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*
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* Copyright (c) 2015 Imagination Technologies
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* Author: Alex Smith <alex.smith@imgtec.com>
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@ -8,18 +8,15 @@
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include "jz4780_bch.h"
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#include "ingenic_ecc.h"
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#define BCH_BHCR 0x0
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#define BCH_BHCCR 0x8
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@ -62,15 +59,8 @@
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/* Timeout for BCH calculation/correction. */
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#define BCH_TIMEOUT_US 100000
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struct jz4780_bch {
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struct device *dev;
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void __iomem *base;
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struct clk *clk;
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struct mutex lock;
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};
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static void jz4780_bch_reset(struct jz4780_bch *bch,
|
||||
struct jz4780_bch_params *params, bool encode)
|
||||
static void jz4780_bch_reset(struct ingenic_ecc *bch,
|
||||
struct ingenic_ecc_params *params, bool encode)
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
|
|
@ -90,13 +80,13 @@ static void jz4780_bch_reset(struct jz4780_bch *bch,
|
|||
writel(reg, bch->base + BCH_BHCR);
|
||||
}
|
||||
|
||||
static void jz4780_bch_disable(struct jz4780_bch *bch)
|
||||
static void jz4780_bch_disable(struct ingenic_ecc *bch)
|
||||
{
|
||||
writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
|
||||
writel(BCH_BHCR_BCHE, bch->base + BCH_BHCCR);
|
||||
}
|
||||
|
||||
static void jz4780_bch_write_data(struct jz4780_bch *bch, const void *buf,
|
||||
static void jz4780_bch_write_data(struct ingenic_ecc *bch, const void *buf,
|
||||
size_t size)
|
||||
{
|
||||
size_t size32 = size / sizeof(u32);
|
||||
|
|
@ -113,7 +103,7 @@ static void jz4780_bch_write_data(struct jz4780_bch *bch, const void *buf,
|
|||
writeb(*src8++, bch->base + BCH_BHDR);
|
||||
}
|
||||
|
||||
static void jz4780_bch_read_parity(struct jz4780_bch *bch, void *buf,
|
||||
static void jz4780_bch_read_parity(struct ingenic_ecc *bch, void *buf,
|
||||
size_t size)
|
||||
{
|
||||
size_t size32 = size / sizeof(u32);
|
||||
|
|
@ -143,7 +133,7 @@ static void jz4780_bch_read_parity(struct jz4780_bch *bch, void *buf,
|
|||
}
|
||||
}
|
||||
|
||||
static bool jz4780_bch_wait_complete(struct jz4780_bch *bch, unsigned int irq,
|
||||
static bool jz4780_bch_wait_complete(struct ingenic_ecc *bch, unsigned int irq,
|
||||
u32 *status)
|
||||
{
|
||||
u32 reg;
|
||||
|
|
@ -167,18 +157,9 @@ static bool jz4780_bch_wait_complete(struct jz4780_bch *bch, unsigned int irq,
|
|||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* jz4780_bch_calculate() - calculate ECC for a data buffer
|
||||
* @bch: BCH device.
|
||||
* @params: BCH parameters.
|
||||
* @buf: input buffer with raw data.
|
||||
* @ecc_code: output buffer with ECC.
|
||||
*
|
||||
* Return: 0 on success, -ETIMEDOUT if timed out while waiting for BCH
|
||||
* controller.
|
||||
*/
|
||||
int jz4780_bch_calculate(struct jz4780_bch *bch, struct jz4780_bch_params *params,
|
||||
const u8 *buf, u8 *ecc_code)
|
||||
static int jz4780_calculate(struct ingenic_ecc *bch,
|
||||
struct ingenic_ecc_params *params,
|
||||
const u8 *buf, u8 *ecc_code)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
|
|
@ -198,23 +179,10 @@ int jz4780_bch_calculate(struct jz4780_bch *bch, struct jz4780_bch_params *param
|
|||
mutex_unlock(&bch->lock);
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(jz4780_bch_calculate);
|
||||
|
||||
/**
|
||||
* jz4780_bch_correct() - detect and correct bit errors
|
||||
* @bch: BCH device.
|
||||
* @params: BCH parameters.
|
||||
* @buf: raw data read from the chip.
|
||||
* @ecc_code: ECC read from the chip.
|
||||
*
|
||||
* Given the raw data and the ECC read from the NAND device, detects and
|
||||
* corrects errors in the data.
|
||||
*
|
||||
* Return: the number of bit errors corrected, -EBADMSG if there are too many
|
||||
* errors to correct or -ETIMEDOUT if we timed out waiting for the controller.
|
||||
*/
|
||||
int jz4780_bch_correct(struct jz4780_bch *bch, struct jz4780_bch_params *params,
|
||||
u8 *buf, u8 *ecc_code)
|
||||
static int jz4780_correct(struct ingenic_ecc *bch,
|
||||
struct ingenic_ecc_params *params,
|
||||
u8 *buf, u8 *ecc_code)
|
||||
{
|
||||
u32 reg, mask, index;
|
||||
int i, ret, count;
|
||||
|
|
@ -260,110 +228,30 @@ out:
|
|||
mutex_unlock(&bch->lock);
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(jz4780_bch_correct);
|
||||
|
||||
/**
|
||||
* jz4780_bch_get() - get the BCH controller device
|
||||
* @np: BCH device tree node.
|
||||
*
|
||||
* Gets the BCH controller device from the specified device tree node. The
|
||||
* device must be released with jz4780_bch_release() when it is no longer being
|
||||
* used.
|
||||
*
|
||||
* Return: a pointer to jz4780_bch, errors are encoded into the pointer.
|
||||
* PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised yet.
|
||||
*/
|
||||
static struct jz4780_bch *jz4780_bch_get(struct device_node *np)
|
||||
{
|
||||
struct platform_device *pdev;
|
||||
struct jz4780_bch *bch;
|
||||
|
||||
pdev = of_find_device_by_node(np);
|
||||
if (!pdev)
|
||||
return ERR_PTR(-EPROBE_DEFER);
|
||||
|
||||
bch = platform_get_drvdata(pdev);
|
||||
if (!bch) {
|
||||
put_device(&pdev->dev);
|
||||
return ERR_PTR(-EPROBE_DEFER);
|
||||
}
|
||||
|
||||
clk_prepare_enable(bch->clk);
|
||||
|
||||
return bch;
|
||||
}
|
||||
|
||||
/**
|
||||
* of_jz4780_bch_get() - get the BCH controller from a DT node
|
||||
* @of_node: the node that contains a bch-controller property.
|
||||
*
|
||||
* Get the bch-controller property from the given device tree
|
||||
* node and pass it to jz4780_bch_get to do the work.
|
||||
*
|
||||
* Return: a pointer to jz4780_bch, errors are encoded into the pointer.
|
||||
* PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised yet.
|
||||
*/
|
||||
struct jz4780_bch *of_jz4780_bch_get(struct device_node *of_node)
|
||||
{
|
||||
struct jz4780_bch *bch = NULL;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_parse_phandle(of_node, "ingenic,bch-controller", 0);
|
||||
|
||||
if (np) {
|
||||
bch = jz4780_bch_get(np);
|
||||
of_node_put(np);
|
||||
}
|
||||
return bch;
|
||||
}
|
||||
EXPORT_SYMBOL(of_jz4780_bch_get);
|
||||
|
||||
/**
|
||||
* jz4780_bch_release() - release the BCH controller device
|
||||
* @bch: BCH device.
|
||||
*/
|
||||
void jz4780_bch_release(struct jz4780_bch *bch)
|
||||
{
|
||||
clk_disable_unprepare(bch->clk);
|
||||
put_device(bch->dev);
|
||||
}
|
||||
EXPORT_SYMBOL(jz4780_bch_release);
|
||||
|
||||
static int jz4780_bch_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct jz4780_bch *bch;
|
||||
struct resource *res;
|
||||
struct ingenic_ecc *bch;
|
||||
int ret;
|
||||
|
||||
bch = devm_kzalloc(dev, sizeof(*bch), GFP_KERNEL);
|
||||
if (!bch)
|
||||
return -ENOMEM;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
bch->base = devm_ioremap_resource(dev, res);
|
||||
if (IS_ERR(bch->base))
|
||||
return PTR_ERR(bch->base);
|
||||
|
||||
jz4780_bch_disable(bch);
|
||||
|
||||
bch->clk = devm_clk_get(dev, NULL);
|
||||
if (IS_ERR(bch->clk)) {
|
||||
dev_err(dev, "failed to get clock: %ld\n", PTR_ERR(bch->clk));
|
||||
return PTR_ERR(bch->clk);
|
||||
}
|
||||
ret = ingenic_ecc_probe(pdev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
bch = platform_get_drvdata(pdev);
|
||||
clk_set_rate(bch->clk, BCH_CLK_RATE);
|
||||
|
||||
mutex_init(&bch->lock);
|
||||
|
||||
bch->dev = dev;
|
||||
platform_set_drvdata(pdev, bch);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct ingenic_ecc_ops jz4780_bch_ops = {
|
||||
.disable = jz4780_bch_disable,
|
||||
.calculate = jz4780_calculate,
|
||||
.correct = jz4780_correct,
|
||||
};
|
||||
|
||||
static const struct of_device_id jz4780_bch_dt_match[] = {
|
||||
{ .compatible = "ingenic,jz4780-bch" },
|
||||
{ .compatible = "ingenic,jz4780-bch", .data = &jz4780_bch_ops },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, jz4780_bch_dt_match);
|
||||
|
|
|
|||
|
|
@ -1,40 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* JZ4780 BCH controller
|
||||
*
|
||||
* Copyright (c) 2015 Imagination Technologies
|
||||
* Author: Alex Smith <alex.smith@imgtec.com>
|
||||
*/
|
||||
|
||||
#ifndef __DRIVERS_MTD_NAND_JZ4780_BCH_H__
|
||||
#define __DRIVERS_MTD_NAND_JZ4780_BCH_H__
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
struct device;
|
||||
struct device_node;
|
||||
struct jz4780_bch;
|
||||
|
||||
/**
|
||||
* struct jz4780_bch_params - BCH parameters
|
||||
* @size: data bytes per ECC step.
|
||||
* @bytes: ECC bytes per step.
|
||||
* @strength: number of correctable bits per ECC step.
|
||||
*/
|
||||
struct jz4780_bch_params {
|
||||
int size;
|
||||
int bytes;
|
||||
int strength;
|
||||
};
|
||||
|
||||
int jz4780_bch_calculate(struct jz4780_bch *bch,
|
||||
struct jz4780_bch_params *params,
|
||||
const u8 *buf, u8 *ecc_code);
|
||||
int jz4780_bch_correct(struct jz4780_bch *bch,
|
||||
struct jz4780_bch_params *params, u8 *buf,
|
||||
u8 *ecc_code);
|
||||
|
||||
void jz4780_bch_release(struct jz4780_bch *bch);
|
||||
struct jz4780_bch *of_jz4780_bch_get(struct device_node *np);
|
||||
|
||||
#endif /* __DRIVERS_MTD_NAND_JZ4780_BCH_H__ */
|
||||
Loading…
Reference in New Issue