ARM: dts: berlin2q: move PMU node from soc to root

Fix "make dtbs W=1" warns about missing reg or ranges property.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
This commit is contained in:
Jisheng Zhang 2018-05-15 18:16:23 +08:00
parent b64ffdecfa
commit 15cf848d3c
1 changed files with 13 additions and 12 deletions

View File

@ -62,6 +62,19 @@
}; };
}; };
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>,
<&cpu1>,
<&cpu2>,
<&cpu3>;
};
refclk: oscillator { refclk: oscillator {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
@ -76,18 +89,6 @@
ranges = <0 0xf7000000 0x1000000>; ranges = <0 0xf7000000 0x1000000>;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>,
<&cpu1>,
<&cpu2>,
<&cpu3>;
};
sdhci0: sdhci@ab0000 { sdhci0: sdhci@ab0000 {
compatible = "mrvl,pxav3-mmc"; compatible = "mrvl,pxav3-mmc";
reg = <0xab0000 0x200>; reg = <0xab0000 0x200>;