Merge branch 'fixes' into devel
This commit is contained in:
commit
158304ef09
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@ -357,7 +357,6 @@ config ARCH_SA1100
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||||||
config ARCH_S3C2410
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config ARCH_S3C2410
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||||||
bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442, S3C2443"
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bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442, S3C2443"
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||||||
select GENERIC_GPIO
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select GENERIC_GPIO
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||||||
select GENERIC_TIME
|
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||||||
help
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help
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Samsung S3C2410X CPU based systems, such as the Simtec Electronics
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Samsung S3C2410X CPU based systems, such as the Simtec Electronics
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||||||
BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
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BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
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||||||
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|
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@ -76,6 +76,7 @@ EXPORT_SYMBOL(__const_udelay);
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||||||
/* networking */
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/* networking */
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||||||
EXPORT_SYMBOL(csum_partial);
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EXPORT_SYMBOL(csum_partial);
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EXPORT_SYMBOL(csum_partial_copy_from_user);
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EXPORT_SYMBOL(csum_partial_copy_nocheck);
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EXPORT_SYMBOL(csum_partial_copy_nocheck);
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EXPORT_SYMBOL(__csum_ipv6_magic);
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EXPORT_SYMBOL(__csum_ipv6_magic);
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||||||
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||||||
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@ -52,21 +52,15 @@ static int save_trace(struct stackframe *frame, void *d)
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return trace->nr_entries >= trace->max_entries;
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return trace->nr_entries >= trace->max_entries;
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}
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}
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void save_stack_trace(struct stack_trace *trace, struct task_struct *task)
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void save_stack_trace(struct stack_trace *trace)
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{
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{
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struct stack_trace_data data;
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struct stack_trace_data data;
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unsigned long fp, base;
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unsigned long fp, base;
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|
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data.trace = trace;
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data.trace = trace;
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data.skip = trace->skip;
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data.skip = trace->skip;
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if (task) {
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base = (unsigned long)task_stack_page(task);
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fp = 0; /* FIXME */
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} else {
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base = (unsigned long)task_stack_page(current);
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base = (unsigned long)task_stack_page(current);
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asm("mov %0, fp" : "=r" (fp));
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asm("mov %0, fp" : "=r" (fp));
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}
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walk_stackframe(fp, base, base + THREAD_SIZE, save_trace, &data);
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walk_stackframe(fp, base, base + THREAD_SIZE, save_trace, &data);
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}
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}
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@ -43,6 +43,7 @@ obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
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# LEDs support
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# LEDs support
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led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
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led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
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led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
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led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
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led-$(CONFIG_MACH_AT91SAM9261EK)+= leds.o
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led-$(CONFIG_MACH_CSB337) += leds.o
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led-$(CONFIG_MACH_CSB337) += leds.o
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led-$(CONFIG_MACH_CSB637) += leds.o
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led-$(CONFIG_MACH_CSB637) += leds.o
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led-$(CONFIG_MACH_KB9200) += leds.o
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led-$(CONFIG_MACH_KB9200) += leds.o
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@ -60,6 +60,9 @@ static void __init ek_map_io(void)
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/* Initialize processor: 18.432 MHz crystal */
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/* Initialize processor: 18.432 MHz crystal */
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at91sam9261_initialize(18432000);
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at91sam9261_initialize(18432000);
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/* Setup the LEDs */
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at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
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/* Setup the serial ports and console */
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/* Setup the serial ports and console */
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at91_init_serial(&ek_uart_config);
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at91_init_serial(&ek_uart_config);
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}
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}
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@ -102,7 +102,7 @@ EXPORT_SYMBOL(__readb);
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EXPORT_SYMBOL(__readw);
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EXPORT_SYMBOL(__readw);
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EXPORT_SYMBOL(__readl);
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EXPORT_SYMBOL(__readl);
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void readsw(void __iomem *addr, void *data, int len)
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void readsw(const void __iomem *addr, void *data, int len)
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{
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{
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void __iomem *a = __isamem_convert_addr(addr);
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void __iomem *a = __isamem_convert_addr(addr);
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@ -112,7 +112,7 @@ void readsw(void __iomem *addr, void *data, int len)
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}
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}
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EXPORT_SYMBOL(readsw);
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EXPORT_SYMBOL(readsw);
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void readsl(void __iomem *addr, void *data, int len)
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void readsl(const void __iomem *addr, void *data, int len)
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{
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{
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void __iomem *a = __isamem_convert_addr(addr);
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void __iomem *a = __isamem_convert_addr(addr);
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@ -157,7 +157,7 @@ EXPORT_SYMBOL(__writeb);
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EXPORT_SYMBOL(__writew);
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EXPORT_SYMBOL(__writew);
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EXPORT_SYMBOL(__writel);
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EXPORT_SYMBOL(__writel);
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void writesw(void __iomem *addr, void *data, int len)
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void writesw(void __iomem *addr, const void *data, int len)
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{
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{
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void __iomem *a = __isamem_convert_addr(addr);
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void __iomem *a = __isamem_convert_addr(addr);
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@ -167,7 +167,7 @@ void writesw(void __iomem *addr, void *data, int len)
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}
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}
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EXPORT_SYMBOL(writesw);
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EXPORT_SYMBOL(writesw);
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void writesl(void __iomem *addr, void *data, int len)
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void writesl(void __iomem *addr, const void *data, int len)
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{
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{
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void __iomem *a = __isamem_convert_addr(addr);
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void __iomem *a = __isamem_convert_addr(addr);
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||||||
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@ -326,7 +326,7 @@ static struct omap_lcd_config h2_lcd_config __initdata = {
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.ctrl_name = "internal",
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.ctrl_name = "internal",
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};
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};
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static struct omap_board_config_kernel h2_config[] = {
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static struct omap_board_config_kernel h2_config[] __initdata = {
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{ OMAP_TAG_USB, &h2_usb_config },
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{ OMAP_TAG_USB, &h2_usb_config },
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{ OMAP_TAG_MMC, &h2_mmc_config },
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{ OMAP_TAG_MMC, &h2_mmc_config },
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{ OMAP_TAG_UART, &h2_uart_config },
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{ OMAP_TAG_UART, &h2_uart_config },
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@ -1,4 +1,3 @@
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//kernel/linux-omap-fsample/arch/arm/mach-omap1/pm.c#3 - integrate change 4545 (text)
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|
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/*
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/*
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* linux/arch/arm/mach-omap1/pm.c
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* linux/arch/arm/mach-omap1/pm.c
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*
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*
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||||||
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@ -631,10 +630,6 @@ static int omap_pm_prepare(suspend_state_t state)
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case PM_SUSPEND_STANDBY:
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case PM_SUSPEND_STANDBY:
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case PM_SUSPEND_MEM:
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case PM_SUSPEND_MEM:
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break;
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break;
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case PM_SUSPEND_DISK:
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return -ENOTSUPP;
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default:
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default:
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -657,10 +652,6 @@ static int omap_pm_enter(suspend_state_t state)
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case PM_SUSPEND_MEM:
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case PM_SUSPEND_MEM:
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omap_pm_suspend();
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omap_pm_suspend();
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break;
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break;
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case PM_SUSPEND_DISK:
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return -ENOTSUPP;
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||||||
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default:
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default:
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -43,7 +43,7 @@ struct pin_config __initdata_or_module omap24xx_pins[] = {
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/* 24xx I2C */
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/* 24xx I2C */
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MUX_CFG_24XX("M19_24XX_I2C1_SCL", 0x111, 0, 0, 0, 1)
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MUX_CFG_24XX("M19_24XX_I2C1_SCL", 0x111, 0, 0, 0, 1)
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MUX_CFG_24XX("L15_24XX_I2C1_SDA", 0x112, 0, 0, 0, 1)
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MUX_CFG_24XX("L15_24XX_I2C1_SDA", 0x112, 0, 0, 0, 1)
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MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 0, 1)
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MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 1, 1)
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MUX_CFG_24XX("H19_24XX_I2C2_SDA", 0x114, 0, 0, 0, 1)
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MUX_CFG_24XX("H19_24XX_I2C2_SDA", 0x114, 0, 0, 0, 1)
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/* Menelaus interrupt */
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/* Menelaus interrupt */
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@ -52,7 +52,9 @@ MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1)
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/* 24xx clocks */
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/* 24xx clocks */
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MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1)
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MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1)
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||||||
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||||||
/* 24xx GPMC wait pin monitoring */
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/* 24xx GPMC chipselects, wait pin monitoring */
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MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1)
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MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1)
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MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1)
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MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1)
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MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1)
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MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1)
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MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1)
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MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1)
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@ -66,6 +68,7 @@ MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1)
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||||||
|
|
||||||
/* 24xx GPIO */
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/* 24xx GPIO */
|
||||||
MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1)
|
MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1)
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||||||
|
MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1)
|
||||||
MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1)
|
MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1)
|
||||||
MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)
|
MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)
|
||||||
MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1)
|
MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1)
|
||||||
|
@ -75,7 +78,9 @@ MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1)
|
||||||
MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1)
|
MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1)
|
||||||
MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
|
MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
|
||||||
MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1)
|
MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1)
|
||||||
MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
|
MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
|
||||||
|
MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1)
|
||||||
|
|
||||||
/* 242x DBG GPIO */
|
/* 242x DBG GPIO */
|
||||||
MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1)
|
MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1)
|
||||||
|
@ -118,6 +123,30 @@ MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3", 0x0fc, 0, 0, 0, 1)
|
||||||
MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR", 0x0fd, 0, 0, 0, 1)
|
MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR", 0x0fd, 0, 0, 0, 1)
|
||||||
MUX_CFG_24XX("H15_24XX_MMC_CLKI", 0x0fe, 0, 0, 0, 1)
|
MUX_CFG_24XX("H15_24XX_MMC_CLKI", 0x0fe, 0, 0, 0, 1)
|
||||||
|
|
||||||
|
/* Full speed USB */
|
||||||
|
MUX_CFG_24XX("J20_24XX_USB0_PUEN", 0x11d, 0, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("J19_24XX_USB0_VP", 0x11e, 0, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("K20_24XX_USB0_VM", 0x11f, 0, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("J18_24XX_USB0_RCV", 0x120, 0, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("K19_24XX_USB0_TXEN", 0x121, 0, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("J14_24XX_USB0_SE0", 0x122, 0, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("K18_24XX_USB0_DAT", 0x123, 0, 0, 0, 1)
|
||||||
|
|
||||||
|
MUX_CFG_24XX("N14_24XX_USB1_SE0", 0x0ed, 2, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("W12_24XX_USB1_SE0", 0x0dd, 3, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("P15_24XX_USB1_DAT", 0x0ee, 2, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("R13_24XX_USB1_DAT", 0x0e0, 3, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("W20_24XX_USB1_TXEN", 0x0ec, 2, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("P13_24XX_USB1_TXEN", 0x0df, 3, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("V19_24XX_USB1_RCV", 0x0eb, 2, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("V12_24XX_USB1_RCV", 0x0de, 3, 0, 0, 1)
|
||||||
|
|
||||||
|
MUX_CFG_24XX("AA10_24XX_USB2_SE0", 0x0e5, 2, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("Y11_24XX_USB2_DAT", 0x0e8, 2, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("AA12_24XX_USB2_TXEN", 0x0e9, 2, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("AA6_24XX_USB2_RCV", 0x0e6, 2, 0, 0, 1)
|
||||||
|
MUX_CFG_24XX("AA4_24XX_USB2_TLLSE0", 0x0e7, 2, 0, 0, 1)
|
||||||
|
|
||||||
/* Keypad GPIO*/
|
/* Keypad GPIO*/
|
||||||
MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1)
|
MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1)
|
||||||
MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1)
|
MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1)
|
||||||
|
|
|
@ -747,7 +747,7 @@ int omap_set_dma_callback(int lch,
|
||||||
*/
|
*/
|
||||||
dma_addr_t omap_get_dma_src_pos(int lch)
|
dma_addr_t omap_get_dma_src_pos(int lch)
|
||||||
{
|
{
|
||||||
dma_addr_t offset;
|
dma_addr_t offset = 0;
|
||||||
|
|
||||||
if (cpu_class_is_omap1())
|
if (cpu_class_is_omap1())
|
||||||
offset = (dma_addr_t) (OMAP1_DMA_CSSA_L_REG(lch) |
|
offset = (dma_addr_t) (OMAP1_DMA_CSSA_L_REG(lch) |
|
||||||
|
@ -769,7 +769,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
|
||||||
*/
|
*/
|
||||||
dma_addr_t omap_get_dma_dst_pos(int lch)
|
dma_addr_t omap_get_dma_dst_pos(int lch)
|
||||||
{
|
{
|
||||||
dma_addr_t offset;
|
dma_addr_t offset = 0;
|
||||||
|
|
||||||
if (cpu_class_is_omap1())
|
if (cpu_class_is_omap1())
|
||||||
offset = (dma_addr_t) (OMAP1_DMA_CDSA_L_REG(lch) |
|
offset = (dma_addr_t) (OMAP1_DMA_CDSA_L_REG(lch) |
|
||||||
|
|
|
@ -83,10 +83,21 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
|
||||||
reg |= OMAP24XX_PULL_ENA;
|
reg |= OMAP24XX_PULL_ENA;
|
||||||
if(cfg->pu_pd_val)
|
if(cfg->pu_pd_val)
|
||||||
reg |= OMAP24XX_PULL_UP;
|
reg |= OMAP24XX_PULL_UP;
|
||||||
|
#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
|
||||||
|
{
|
||||||
|
u8 orig = omap_readb(OMAP24XX_L4_BASE + cfg->mux_reg);
|
||||||
|
u8 debug = 0;
|
||||||
|
|
||||||
#ifdef CONFIG_OMAP_MUX_DEBUG
|
#ifdef CONFIG_OMAP_MUX_DEBUG
|
||||||
printk("Muxing %s (0x%08x): 0x%02x -> 0x%02x\n",
|
debug = cfg->debug;
|
||||||
cfg->name, OMAP24XX_L4_BASE + cfg->mux_reg,
|
#endif
|
||||||
omap_readb(OMAP24XX_L4_BASE + cfg->mux_reg), reg);
|
warn = (orig != reg);
|
||||||
|
if (debug || warn)
|
||||||
|
printk("MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n",
|
||||||
|
cfg->name,
|
||||||
|
OMAP24XX_L4_BASE + cfg->mux_reg,
|
||||||
|
orig, reg);
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
omap_writeb(reg, OMAP24XX_L4_BASE + cfg->mux_reg);
|
omap_writeb(reg, OMAP24XX_L4_BASE + cfg->mux_reg);
|
||||||
|
|
||||||
|
|
|
@ -71,22 +71,5 @@
|
||||||
/* Clocks */
|
/* Clocks */
|
||||||
#define AT91_SLOW_CLOCK 32768 /* slow clock */
|
#define AT91_SLOW_CLOCK 32768 /* slow clock */
|
||||||
|
|
||||||
#ifndef __ASSEMBLY__
|
|
||||||
#include <asm/io.h>
|
|
||||||
|
|
||||||
static inline unsigned int at91_sys_read(unsigned int reg_offset)
|
|
||||||
{
|
|
||||||
void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
|
|
||||||
|
|
||||||
return __raw_readl(addr + reg_offset);
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
|
|
||||||
{
|
|
||||||
void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
|
|
||||||
|
|
||||||
__raw_writel(value, addr + reg_offset);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -29,4 +29,22 @@
|
||||||
#define __mem_pci(a) (a)
|
#define __mem_pci(a) (a)
|
||||||
|
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
static inline unsigned int at91_sys_read(unsigned int reg_offset)
|
||||||
|
{
|
||||||
|
void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
|
||||||
|
|
||||||
|
return __raw_readl(addr + reg_offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
|
||||||
|
{
|
||||||
|
void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
|
||||||
|
|
||||||
|
__raw_writel(value, addr + reg_offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -21,6 +21,7 @@
|
||||||
#ifndef __ASM_ARCH_IRQS_H
|
#ifndef __ASM_ARCH_IRQS_H
|
||||||
#define __ASM_ARCH_IRQS_H
|
#define __ASM_ARCH_IRQS_H
|
||||||
|
|
||||||
|
#include <asm/io.h>
|
||||||
#include <asm/arch/at91_aic.h>
|
#include <asm/arch/at91_aic.h>
|
||||||
|
|
||||||
#define NR_AIC_IRQS 32
|
#define NR_AIC_IRQS 32
|
||||||
|
|
|
@ -21,7 +21,7 @@
|
||||||
#ifndef __ASM_ARCH_UNCOMPRESS_H
|
#ifndef __ASM_ARCH_UNCOMPRESS_H
|
||||||
#define __ASM_ARCH_UNCOMPRESS_H
|
#define __ASM_ARCH_UNCOMPRESS_H
|
||||||
|
|
||||||
#include <asm/hardware.h>
|
#include <asm/io.h>
|
||||||
#include <asm/arch/at91_dbgu.h>
|
#include <asm/arch/at91_dbgu.h>
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -27,7 +27,7 @@
|
||||||
|
|
||||||
extern void __iomem * __iop13xx_io(unsigned long io_addr);
|
extern void __iomem * __iop13xx_io(unsigned long io_addr);
|
||||||
extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size,
|
extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size,
|
||||||
unsigned long flags);
|
unsigned int mtype);
|
||||||
extern void __iop13xx_iounmap(void __iomem *addr);
|
extern void __iop13xx_iounmap(void __iomem *addr);
|
||||||
|
|
||||||
extern u32 iop13xx_atue_mem_base;
|
extern u32 iop13xx_atue_mem_base;
|
||||||
|
|
|
@ -14,7 +14,7 @@
|
||||||
#include <asm/hardware.h>
|
#include <asm/hardware.h>
|
||||||
|
|
||||||
extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
|
extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
|
||||||
unsigned long flags);
|
unsigned int mtype);
|
||||||
extern void __iop3xx_iounmap(void __iomem *addr);
|
extern void __iop3xx_iounmap(void __iomem *addr);
|
||||||
|
|
||||||
#define IO_SPACE_LIMIT 0xffffffff
|
#define IO_SPACE_LIMIT 0xffffffff
|
||||||
|
|
|
@ -14,7 +14,7 @@
|
||||||
#include <asm/hardware.h>
|
#include <asm/hardware.h>
|
||||||
|
|
||||||
extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
|
extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
|
||||||
unsigned long flags);
|
unsigned int mtype);
|
||||||
extern void __iop3xx_iounmap(void __iomem *addr);
|
extern void __iop3xx_iounmap(void __iomem *addr);
|
||||||
|
|
||||||
#define IO_SPACE_LIMIT 0xffffffff
|
#define IO_SPACE_LIMIT 0xffffffff
|
||||||
|
|
|
@ -421,7 +421,9 @@ enum omap24xx_index {
|
||||||
/* 24xx clock */
|
/* 24xx clock */
|
||||||
W14_24XX_SYS_CLKOUT,
|
W14_24XX_SYS_CLKOUT,
|
||||||
|
|
||||||
/* 24xx GPMC wait pin monitoring */
|
/* 24xx GPMC chipselects, wait pin monitoring */
|
||||||
|
E2_GPMC_NCS2,
|
||||||
|
L2_GPMC_NCS7,
|
||||||
L3_GPMC_WAIT0,
|
L3_GPMC_WAIT0,
|
||||||
N7_GPMC_WAIT1,
|
N7_GPMC_WAIT1,
|
||||||
M1_GPMC_WAIT2,
|
M1_GPMC_WAIT2,
|
||||||
|
@ -435,6 +437,7 @@ enum omap24xx_index {
|
||||||
|
|
||||||
/* 24xx GPIO */
|
/* 24xx GPIO */
|
||||||
M21_242X_GPIO11,
|
M21_242X_GPIO11,
|
||||||
|
P21_242X_GPIO12,
|
||||||
AA10_242X_GPIO13,
|
AA10_242X_GPIO13,
|
||||||
AA6_242X_GPIO14,
|
AA6_242X_GPIO14,
|
||||||
AA4_242X_GPIO15,
|
AA4_242X_GPIO15,
|
||||||
|
@ -444,7 +447,9 @@ enum omap24xx_index {
|
||||||
Y20_24XX_GPIO60,
|
Y20_24XX_GPIO60,
|
||||||
W4__24XX_GPIO74,
|
W4__24XX_GPIO74,
|
||||||
M15_24XX_GPIO92,
|
M15_24XX_GPIO92,
|
||||||
|
J15_24XX_GPIO99,
|
||||||
V14_24XX_GPIO117,
|
V14_24XX_GPIO117,
|
||||||
|
P14_24XX_GPIO125,
|
||||||
|
|
||||||
/* 242x DBG GPIO */
|
/* 242x DBG GPIO */
|
||||||
V4_242X_GPIO49,
|
V4_242X_GPIO49,
|
||||||
|
@ -486,6 +491,30 @@ enum omap24xx_index {
|
||||||
G18_24XX_MMC_CMD_DIR,
|
G18_24XX_MMC_CMD_DIR,
|
||||||
H15_24XX_MMC_CLKI,
|
H15_24XX_MMC_CLKI,
|
||||||
|
|
||||||
|
/* Full speed USB */
|
||||||
|
J20_24XX_USB0_PUEN,
|
||||||
|
J19_24XX_USB0_VP,
|
||||||
|
K20_24XX_USB0_VM,
|
||||||
|
J18_24XX_USB0_RCV,
|
||||||
|
K19_24XX_USB0_TXEN,
|
||||||
|
J14_24XX_USB0_SE0,
|
||||||
|
K18_24XX_USB0_DAT,
|
||||||
|
|
||||||
|
N14_24XX_USB1_SE0,
|
||||||
|
W12_24XX_USB1_SE0,
|
||||||
|
P15_24XX_USB1_DAT,
|
||||||
|
R13_24XX_USB1_DAT,
|
||||||
|
W20_24XX_USB1_TXEN,
|
||||||
|
P13_24XX_USB1_TXEN,
|
||||||
|
V19_24XX_USB1_RCV,
|
||||||
|
V12_24XX_USB1_RCV,
|
||||||
|
|
||||||
|
AA10_24XX_USB2_SE0,
|
||||||
|
Y11_24XX_USB2_DAT,
|
||||||
|
AA12_24XX_USB2_TXEN,
|
||||||
|
AA6_24XX_USB2_RCV,
|
||||||
|
AA4_24XX_USB2_TLLSE0,
|
||||||
|
|
||||||
/* Keypad GPIO*/
|
/* Keypad GPIO*/
|
||||||
T19_24XX_KBR0,
|
T19_24XX_KBR0,
|
||||||
R19_24XX_KBR1,
|
R19_24XX_KBR1,
|
||||||
|
|
Loading…
Reference in New Issue