dt-bindings: ufs: cdns,ufshc: convert to dtschema
Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema format. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220306111125.116455-4-krzysztof.kozlowski@canonical.com
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* Cadence Universal Flash Storage (UFS) Controller
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UFS nodes are defined to describe on-chip UFS host controllers.
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Each UFS controller instance should have its own node.
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Please see the ufshcd-pltfrm.txt for a list of all available properties.
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Required properties:
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- compatible : Compatible list, contains one of the following controllers:
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"cdns,ufshc" - Generic CDNS HCI,
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"cdns,ufshc-m31-16nm" - CDNS UFS HC + M31 16nm PHY
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complemented with the JEDEC version:
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"jedec,ufs-2.0"
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- reg : Address and length of the UFS register set.
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- interrupts : One interrupt mapping.
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- freq-table-hz : Clock frequency table.
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See the ufshcd-pltfrm.txt for details.
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- clocks : List of phandle and clock specifier pairs.
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- clock-names : List of clock input name strings sorted in the same
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order as the clocks property. "core_clk" is mandatory.
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Depending on a type of a PHY,
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the "phy_clk" clock can also be added, if needed.
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Example:
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ufs@fd030000 {
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compatible = "cdns,ufshc", "jedec,ufs-2.0";
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reg = <0xfd030000 0x10000>;
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interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>;
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freq-table-hz = <0 0>, <0 0>;
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clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
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clock-names = "core_clk", "phy_clk";
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};
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/ufs/cdns,ufshc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence Universal Flash Storage (UFS) Controller
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maintainers:
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- Jan Kotas <jank@cadence.com>
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# Select only our matches, not all jedec,ufs-2.0
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select:
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properties:
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compatible:
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contains:
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enum:
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- cdns,ufshc
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- cdns,ufshc-m31-16nm
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required:
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- compatible
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allOf:
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- $ref: ufs-common.yaml
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properties:
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compatible:
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items:
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- enum:
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- cdns,ufshc
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# CDNS UFS HC + M31 16nm PHY
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- cdns,ufshc-m31-16nm
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- const: jedec,ufs-2.0
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clocks:
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minItems: 1
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maxItems: 3
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clock-names:
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minItems: 1
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items:
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- const: core_clk
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- const: phy_clk
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- const: ref_clk
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reg:
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maxItems: 1
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required:
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- compatible
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- clocks
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- clock-names
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- reg
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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ufs@fd030000 {
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compatible = "cdns,ufshc", "jedec,ufs-2.0";
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reg = <0xfd030000 0x10000>;
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interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
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freq-table-hz = <0 0>, <0 0>;
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clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
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clock-names = "core_clk", "phy_clk";
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};
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@ -47,11 +47,10 @@ required:
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patternProperties:
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"^ufs@[0-9a-f]+$":
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type: object
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$ref: cdns,ufshc.yaml
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description: |
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Cadence UFS controller node must be the child node. Refer
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Documentation/devicetree/bindings/ufs/cdns,ufshc.txt for binding
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documentation of child node
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Cadence UFS controller node must be the child node.
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unevaluatedProperties: false
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additionalProperties: false
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