ASoC: tas6424: Add support for TAS6424 digital amplifier
The Texas Instruments TAS6424 device is a high-efficiency quad-channel Class-D audio power amplifier. Its digital time division multiplexed (TDM) interface enables up to 2 devices to share the same bus, supporting a total of eight channels from one audio serial port. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Michael Stecklein <m-stecklein@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Andreas Dannenberg
Mark Brown
parent
2e66234296
commit
157b68babe
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@ -148,6 +148,7 @@ config SND_SOC_ALL_CODECS
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select SND_SOC_TAS5086 if I2C
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select SND_SOC_TAS571X if I2C
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select SND_SOC_TAS5720 if I2C
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select SND_SOC_TAS6424 if I2C
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select SND_SOC_TFA9879 if I2C
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select SND_SOC_TLV320AIC23_I2C if I2C
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select SND_SOC_TLV320AIC23_SPI if SPI_MASTER
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@ -883,6 +884,13 @@ config SND_SOC_TAS5720
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Enable support for Texas Instruments TAS5720L/M high-efficiency mono
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Class-D audio power amplifiers.
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config SND_SOC_TAS6424
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tristate "Texas Instruments TAS6424 Quad-Channel Audio amplifier"
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depends on I2C
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help
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Enable support for Texas Instruments TAS6424 high-efficiency
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digital input quad-channel Class-D audio power amplifiers.
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config SND_SOC_TFA9879
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tristate "NXP Semiconductors TFA9879 amplifier"
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depends on I2C
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@ -156,6 +156,7 @@ snd-soc-sti-sas-objs := sti-sas.o
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snd-soc-tas5086-objs := tas5086.o
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snd-soc-tas571x-objs := tas571x.o
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snd-soc-tas5720-objs := tas5720.o
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snd-soc-tas6424-objs := tas6424.o
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snd-soc-tfa9879-objs := tfa9879.o
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snd-soc-tlv320aic23-objs := tlv320aic23.o
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snd-soc-tlv320aic23-i2c-objs := tlv320aic23-i2c.o
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@ -395,6 +396,7 @@ obj-$(CONFIG_SND_SOC_TAS2552) += snd-soc-tas2552.o
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obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o
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obj-$(CONFIG_SND_SOC_TAS571X) += snd-soc-tas571x.o
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obj-$(CONFIG_SND_SOC_TAS5720) += snd-soc-tas5720.o
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obj-$(CONFIG_SND_SOC_TAS6424) += snd-soc-tas6424.o
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obj-$(CONFIG_SND_SOC_TFA9879) += snd-soc-tfa9879.o
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obj-$(CONFIG_SND_SOC_TLV320AIC23) += snd-soc-tlv320aic23.o
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obj-$(CONFIG_SND_SOC_TLV320AIC23_I2C) += snd-soc-tlv320aic23-i2c.o
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@ -0,0 +1,707 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* ALSA SoC Texas Instruments TAS6424 Quad-Channel Audio Amplifier
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*
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* Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
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* Author: Andreas Dannenberg <dannenberg@ti.com>
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* Andrew F. Davis <afd@ti.com>
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*/
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/device.h>
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#include <linux/i2c.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/regulator/consumer.h>
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#include <linux/delay.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/tlv.h>
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#include "tas6424.h"
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/* Define how often to check (and clear) the fault status register (in ms) */
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#define TAS6424_FAULT_CHECK_INTERVAL 200
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static const char * const tas6424_supply_names[] = {
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"dvdd", /* Digital power supply. Connect to 3.3-V supply. */
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"vbat", /* Supply used for higher voltage analog circuits. */
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"pvdd", /* Class-D amp output FETs supply. */
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};
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#define TAS6424_NUM_SUPPLIES ARRAY_SIZE(tas6424_supply_names)
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struct tas6424_data {
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struct device *dev;
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struct regmap *regmap;
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struct regulator_bulk_data supplies[TAS6424_NUM_SUPPLIES];
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struct delayed_work fault_check_work;
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unsigned int last_fault1;
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unsigned int last_fault2;
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unsigned int last_warn;
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};
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/*
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* DAC digital volumes. From -103.5 to 24 dB in 0.5 dB steps. Note that
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* setting the gain below -100 dB (register value <0x7) is effectively a MUTE
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* as per device datasheet.
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*/
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static DECLARE_TLV_DB_SCALE(dac_tlv, -10350, 50, 0);
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static const struct snd_kcontrol_new tas6424_snd_controls[] = {
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SOC_SINGLE_TLV("Speaker Driver CH1 Playback Volume",
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TAS6424_CH1_VOL_CTRL, 0, 0xff, 0, dac_tlv),
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SOC_SINGLE_TLV("Speaker Driver CH2 Playback Volume",
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TAS6424_CH2_VOL_CTRL, 0, 0xff, 0, dac_tlv),
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SOC_SINGLE_TLV("Speaker Driver CH3 Playback Volume",
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TAS6424_CH3_VOL_CTRL, 0, 0xff, 0, dac_tlv),
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SOC_SINGLE_TLV("Speaker Driver CH4 Playback Volume",
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TAS6424_CH4_VOL_CTRL, 0, 0xff, 0, dac_tlv),
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};
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static int tas6424_dac_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
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struct tas6424_data *tas6424 = snd_soc_codec_get_drvdata(codec);
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dev_dbg(codec->dev, "%s() event=0x%0x\n", __func__, event);
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if (event & SND_SOC_DAPM_POST_PMU) {
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/* Observe codec shutdown-to-active time */
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msleep(12);
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/* Turn on TAS6424 periodic fault checking/handling */
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tas6424->last_fault1 = 0;
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tas6424->last_fault2 = 0;
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tas6424->last_warn = 0;
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schedule_delayed_work(&tas6424->fault_check_work,
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msecs_to_jiffies(TAS6424_FAULT_CHECK_INTERVAL));
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} else if (event & SND_SOC_DAPM_PRE_PMD) {
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/* Disable TAS6424 periodic fault checking/handling */
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cancel_delayed_work_sync(&tas6424->fault_check_work);
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}
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return 0;
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}
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static const struct snd_soc_dapm_widget tas6424_dapm_widgets[] = {
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SND_SOC_DAPM_AIF_IN("DAC IN", "Playback", 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas6424_dac_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_OUTPUT("OUT")
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};
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static const struct snd_soc_dapm_route tas6424_audio_map[] = {
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{ "DAC", NULL, "DAC IN" },
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{ "OUT", NULL, "DAC" },
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};
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static int tas6424_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec = dai->codec;
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unsigned int rate = params_rate(params);
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unsigned int width = params_width(params);
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u8 sap_ctrl = 0;
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dev_dbg(codec->dev, "%s() rate=%u width=%u\n", __func__, rate, width);
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switch (rate) {
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case 44100:
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sap_ctrl |= TAS6424_SAP_RATE_44100;
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break;
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case 48000:
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sap_ctrl |= TAS6424_SAP_RATE_48000;
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break;
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case 96000:
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sap_ctrl |= TAS6424_SAP_RATE_96000;
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break;
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default:
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dev_err(codec->dev, "unsupported sample rate: %u\n", rate);
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return -EINVAL;
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}
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switch (width) {
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case 16:
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sap_ctrl |= TAS6424_SAP_TDM_SLOT_SZ_16;
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break;
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case 24:
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break;
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default:
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dev_err(codec->dev, "unsupported sample width: %u\n", width);
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return -EINVAL;
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}
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snd_soc_update_bits(codec, TAS6424_SAP_CTRL,
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TAS6424_SAP_RATE_MASK |
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TAS6424_SAP_TDM_SLOT_SZ_16,
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sap_ctrl);
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return 0;
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}
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static int tas6424_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct snd_soc_codec *codec = dai->codec;
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u8 serial_format = 0;
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dev_dbg(codec->dev, "%s() fmt=0x%0x\n", __func__, fmt);
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/* clock masters */
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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break;
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default:
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dev_err(codec->dev, "Invalid DAI master/slave interface\n");
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return -EINVAL;
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}
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/* signal polarity */
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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break;
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default:
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dev_err(codec->dev, "Invalid DAI clock signal polarity\n");
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return -EINVAL;
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}
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/* interface format */
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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serial_format |= TAS6424_SAP_I2S;
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break;
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case SND_SOC_DAIFMT_DSP_A:
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serial_format |= TAS6424_SAP_DSP;
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break;
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case SND_SOC_DAIFMT_DSP_B:
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/*
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* We can use the fact that the TAS6424 does not care about the
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* LRCLK duty cycle during TDM to receive DSP_B formatted data
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* in LEFTJ mode (no delaying of the 1st data bit).
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*/
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serial_format |= TAS6424_SAP_LEFTJ;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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serial_format |= TAS6424_SAP_LEFTJ;
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break;
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default:
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dev_err(codec->dev, "Invalid DAI interface format\n");
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return -EINVAL;
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}
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snd_soc_update_bits(codec, TAS6424_SAP_CTRL,
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TAS6424_SAP_FMT_MASK, serial_format);
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return 0;
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}
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static int tas6424_set_dai_tdm_slot(struct snd_soc_dai *dai,
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unsigned int tx_mask, unsigned int rx_mask,
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int slots, int slot_width)
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{
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struct snd_soc_codec *codec = dai->codec;
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unsigned int first_slot, last_slot;
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bool sap_tdm_slot_last;
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dev_dbg(codec->dev, "%s() tx_mask=%d rx_mask=%d\n", __func__,
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tx_mask, rx_mask);
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if (!tx_mask || !rx_mask)
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return 0; /* nothing needed to disable TDM mode */
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/*
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* Determine the first slot and last slot that is being requested so
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* we'll be able to more easily enforce certain constraints as the
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* TAS6424's TDM interface is not fully configurable.
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*/
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first_slot = __ffs(tx_mask);
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last_slot = __fls(rx_mask);
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if (last_slot - first_slot != 4) {
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dev_err(codec->dev, "tdm mask must cover 4 contiguous slots\n");
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return -EINVAL;
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}
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switch (first_slot) {
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case 0:
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sap_tdm_slot_last = false;
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break;
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case 4:
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sap_tdm_slot_last = true;
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break;
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default:
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dev_err(codec->dev, "tdm mask must start at slot 0 or 4\n");
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return -EINVAL;
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}
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snd_soc_update_bits(codec, TAS6424_SAP_CTRL, TAS6424_SAP_TDM_SLOT_LAST,
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sap_tdm_slot_last ? TAS6424_SAP_TDM_SLOT_LAST : 0);
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return 0;
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}
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static int tas6424_mute(struct snd_soc_dai *dai, int mute)
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{
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struct snd_soc_codec *codec = dai->codec;
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unsigned int val;
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dev_dbg(codec->dev, "%s() mute=%d\n", __func__, mute);
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if (mute)
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val = TAS6424_ALL_STATE_MUTE;
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else
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val = TAS6424_ALL_STATE_PLAY;
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snd_soc_write(codec, TAS6424_CH_STATE_CTRL, val);
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return 0;
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}
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static int tas6424_power_off(struct snd_soc_codec *codec)
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{
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struct tas6424_data *tas6424 = snd_soc_codec_get_drvdata(codec);
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int ret;
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snd_soc_write(codec, TAS6424_CH_STATE_CTRL, TAS6424_ALL_STATE_HIZ);
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regcache_cache_only(tas6424->regmap, true);
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regcache_mark_dirty(tas6424->regmap);
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ret = regulator_bulk_disable(ARRAY_SIZE(tas6424->supplies),
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tas6424->supplies);
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if (ret < 0) {
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dev_err(codec->dev, "failed to disable supplies: %d\n", ret);
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return ret;
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}
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return 0;
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}
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static int tas6424_power_on(struct snd_soc_codec *codec)
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{
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struct tas6424_data *tas6424 = snd_soc_codec_get_drvdata(codec);
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int ret;
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ret = regulator_bulk_enable(ARRAY_SIZE(tas6424->supplies),
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tas6424->supplies);
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if (ret < 0) {
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dev_err(codec->dev, "failed to enable supplies: %d\n", ret);
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return ret;
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}
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regcache_cache_only(tas6424->regmap, false);
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ret = regcache_sync(tas6424->regmap);
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if (ret < 0) {
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dev_err(codec->dev, "failed to sync regcache: %d\n", ret);
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return ret;
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}
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snd_soc_write(codec, TAS6424_CH_STATE_CTRL, TAS6424_ALL_STATE_MUTE);
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/* any time we come out of HIZ, the output channels automatically run DC
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* load diagnostics, wait here until this completes
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*/
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msleep(230);
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return 0;
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}
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static int tas6424_set_bias_level(struct snd_soc_codec *codec,
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enum snd_soc_bias_level level)
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{
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dev_dbg(codec->dev, "%s() level=%d\n", __func__, level);
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switch (level) {
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case SND_SOC_BIAS_ON:
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case SND_SOC_BIAS_PREPARE:
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break;
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case SND_SOC_BIAS_STANDBY:
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if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF)
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tas6424_power_on(codec);
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break;
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case SND_SOC_BIAS_OFF:
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tas6424_power_off(codec);
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break;
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}
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return 0;
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}
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static struct snd_soc_codec_driver soc_codec_dev_tas6424 = {
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.set_bias_level = tas6424_set_bias_level,
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.idle_bias_off = true,
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.component_driver = {
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.controls = tas6424_snd_controls,
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.num_controls = ARRAY_SIZE(tas6424_snd_controls),
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.dapm_widgets = tas6424_dapm_widgets,
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.num_dapm_widgets = ARRAY_SIZE(tas6424_dapm_widgets),
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.dapm_routes = tas6424_audio_map,
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.num_dapm_routes = ARRAY_SIZE(tas6424_audio_map),
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},
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};
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static struct snd_soc_dai_ops tas6424_speaker_dai_ops = {
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.hw_params = tas6424_hw_params,
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.set_fmt = tas6424_set_dai_fmt,
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.set_tdm_slot = tas6424_set_dai_tdm_slot,
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.digital_mute = tas6424_mute,
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};
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static struct snd_soc_dai_driver tas6424_dai[] = {
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{
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.name = "tas6424-amplifier",
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.playback = {
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.stream_name = "Playback",
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.channels_min = 1,
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.channels_max = 4,
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.rates = TAS6424_RATES,
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.formats = TAS6424_FORMATS,
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},
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.ops = &tas6424_speaker_dai_ops,
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},
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};
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static void tas6424_fault_check_work(struct work_struct *work)
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{
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struct tas6424_data *tas6424 = container_of(work, struct tas6424_data,
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fault_check_work.work);
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struct device *dev = tas6424->dev;
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unsigned int reg;
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int ret;
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ret = regmap_read(tas6424->regmap, TAS6424_GLOB_FAULT1, ®);
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if (ret < 0) {
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dev_err(dev, "failed to read FAULT1 register: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
/*
|
||||
* Ignore any clock faults as there is no clean way to check for them.
|
||||
* We would need to start checking for those faults *after* the SAIF
|
||||
* stream has been setup, and stop checking *before* the stream is
|
||||
* stopped to avoid any false-positives. However there are no
|
||||
* appropriate hooks to monitor these events.
|
||||
*/
|
||||
reg &= TAS6424_FAULT_PVDD_OV |
|
||||
TAS6424_FAULT_VBAT_OV |
|
||||
TAS6424_FAULT_PVDD_UV |
|
||||
TAS6424_FAULT_VBAT_UV;
|
||||
|
||||
if (reg)
|
||||
goto check_global_fault2_reg;
|
||||
|
||||
/*
|
||||
* Only flag errors once for a given occurrence. This is needed as
|
||||
* the TAS6424 will take time clearing the fault condition internally
|
||||
* during which we don't want to bombard the system with the same
|
||||
* error message over and over.
|
||||
*/
|
||||
if ((reg & TAS6424_FAULT_PVDD_OV) && !(tas6424->last_fault1 & TAS6424_FAULT_PVDD_OV))
|
||||
dev_crit(dev, "experienced a PVDD overvoltage fault\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_VBAT_OV) && !(tas6424->last_fault1 & TAS6424_FAULT_VBAT_OV))
|
||||
dev_crit(dev, "experienced a VBAT overvoltage fault\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_PVDD_UV) && !(tas6424->last_fault1 & TAS6424_FAULT_PVDD_UV))
|
||||
dev_crit(dev, "experienced a PVDD undervoltage fault\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_VBAT_UV) && !(tas6424->last_fault1 & TAS6424_FAULT_VBAT_UV))
|
||||
dev_crit(dev, "experienced a VBAT undervoltage fault\n");
|
||||
|
||||
/* Store current fault1 value so we can detect any changes next time */
|
||||
tas6424->last_fault1 = reg;
|
||||
|
||||
check_global_fault2_reg:
|
||||
ret = regmap_read(tas6424->regmap, TAS6424_GLOB_FAULT2, ®);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "failed to read FAULT2 register: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
reg &= TAS6424_FAULT_OTSD |
|
||||
TAS6424_FAULT_OTSD_CH1 |
|
||||
TAS6424_FAULT_OTSD_CH2 |
|
||||
TAS6424_FAULT_OTSD_CH3 |
|
||||
TAS6424_FAULT_OTSD_CH4;
|
||||
|
||||
if (!reg)
|
||||
goto check_warn_reg;
|
||||
|
||||
if ((reg & TAS6424_FAULT_OTSD) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD))
|
||||
dev_crit(dev, "experienced a global overtemp shutdown\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_OTSD_CH1) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD_CH1))
|
||||
dev_crit(dev, "experienced an overtemp shutdown on CH1\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_OTSD_CH2) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD_CH2))
|
||||
dev_crit(dev, "experienced an overtemp shutdown on CH2\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_OTSD_CH3) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD_CH3))
|
||||
dev_crit(dev, "experienced an overtemp shutdown on CH3\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_OTSD_CH4) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD_CH4))
|
||||
dev_crit(dev, "experienced an overtemp shutdown on CH4\n");
|
||||
|
||||
/* Store current fault2 value so we can detect any changes next time */
|
||||
tas6424->last_fault2 = reg;
|
||||
|
||||
check_warn_reg:
|
||||
ret = regmap_read(tas6424->regmap, TAS6424_WARN, ®);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "failed to read WARN register: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
reg &= TAS6424_WARN_VDD_UV |
|
||||
TAS6424_WARN_VDD_POR |
|
||||
TAS6424_WARN_VDD_OTW |
|
||||
TAS6424_WARN_VDD_OTW_CH1 |
|
||||
TAS6424_WARN_VDD_OTW_CH2 |
|
||||
TAS6424_WARN_VDD_OTW_CH3 |
|
||||
TAS6424_WARN_VDD_OTW_CH4;
|
||||
|
||||
if (!reg)
|
||||
goto out;
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_UV) && !(tas6424->last_warn & TAS6424_WARN_VDD_UV))
|
||||
dev_warn(dev, "experienced a VDD under voltage condition\n");
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_POR) && !(tas6424->last_warn & TAS6424_WARN_VDD_POR))
|
||||
dev_warn(dev, "experienced a VDD POR condition\n");
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_OTW) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW))
|
||||
dev_warn(dev, "experienced a global overtemp warning\n");
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_OTW_CH1) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW_CH1))
|
||||
dev_warn(dev, "experienced an overtemp warning on CH1\n");
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_OTW_CH2) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW_CH2))
|
||||
dev_warn(dev, "experienced an overtemp warning on CH2\n");
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_OTW_CH3) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW_CH3))
|
||||
dev_warn(dev, "experienced an overtemp warning on CH3\n");
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_OTW_CH4) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW_CH4))
|
||||
dev_warn(dev, "experienced an overtemp warning on CH4\n");
|
||||
|
||||
/* Store current warn value so we can detect any changes next time */
|
||||
tas6424->last_warn = reg;
|
||||
|
||||
/* Clear any faults by toggling the CLEAR_FAULT control bit */
|
||||
ret = regmap_write_bits(tas6424->regmap, TAS6424_MISC_CTRL3,
|
||||
TAS6424_CLEAR_FAULT, TAS6424_CLEAR_FAULT);
|
||||
if (ret < 0)
|
||||
dev_err(dev, "failed to write MISC_CTRL3 register: %d\n", ret);
|
||||
|
||||
ret = regmap_write_bits(tas6424->regmap, TAS6424_MISC_CTRL3,
|
||||
TAS6424_CLEAR_FAULT, 0);
|
||||
if (ret < 0)
|
||||
dev_err(dev, "failed to write MISC_CTRL3 register: %d\n", ret);
|
||||
|
||||
out:
|
||||
/* Schedule the next fault check at the specified interval */
|
||||
schedule_delayed_work(&tas6424->fault_check_work,
|
||||
msecs_to_jiffies(TAS6424_FAULT_CHECK_INTERVAL));
|
||||
}
|
||||
|
||||
static const struct reg_default tas6424_reg_defaults[] = {
|
||||
{ TAS6424_MODE_CTRL, 0x00 },
|
||||
{ TAS6424_MISC_CTRL1, 0x32 },
|
||||
{ TAS6424_MISC_CTRL2, 0x62 },
|
||||
{ TAS6424_SAP_CTRL, 0x04 },
|
||||
{ TAS6424_CH_STATE_CTRL, 0x55 },
|
||||
{ TAS6424_CH1_VOL_CTRL, 0xcf },
|
||||
{ TAS6424_CH2_VOL_CTRL, 0xcf },
|
||||
{ TAS6424_CH3_VOL_CTRL, 0xcf },
|
||||
{ TAS6424_CH4_VOL_CTRL, 0xcf },
|
||||
{ TAS6424_DC_DIAG_CTRL1, 0x00 },
|
||||
{ TAS6424_DC_DIAG_CTRL2, 0x11 },
|
||||
{ TAS6424_DC_DIAG_CTRL3, 0x11 },
|
||||
{ TAS6424_PIN_CTRL, 0xff },
|
||||
{ TAS6424_AC_DIAG_CTRL1, 0x00 },
|
||||
{ TAS6424_MISC_CTRL3, 0x00 },
|
||||
{ TAS6424_CLIP_CTRL, 0x01 },
|
||||
{ TAS6424_CLIP_WINDOW, 0x14 },
|
||||
{ TAS6424_CLIP_WARN, 0x00 },
|
||||
{ TAS6424_CBC_STAT, 0x00 },
|
||||
{ TAS6424_MISC_CTRL4, 0x40 },
|
||||
};
|
||||
|
||||
static bool tas6424_is_writable_reg(struct device *dev, unsigned int reg)
|
||||
{
|
||||
switch (reg) {
|
||||
case TAS6424_MODE_CTRL:
|
||||
case TAS6424_MISC_CTRL1:
|
||||
case TAS6424_MISC_CTRL2:
|
||||
case TAS6424_SAP_CTRL:
|
||||
case TAS6424_CH_STATE_CTRL:
|
||||
case TAS6424_CH1_VOL_CTRL:
|
||||
case TAS6424_CH2_VOL_CTRL:
|
||||
case TAS6424_CH3_VOL_CTRL:
|
||||
case TAS6424_CH4_VOL_CTRL:
|
||||
case TAS6424_DC_DIAG_CTRL1:
|
||||
case TAS6424_DC_DIAG_CTRL2:
|
||||
case TAS6424_DC_DIAG_CTRL3:
|
||||
case TAS6424_PIN_CTRL:
|
||||
case TAS6424_AC_DIAG_CTRL1:
|
||||
case TAS6424_MISC_CTRL3:
|
||||
case TAS6424_CLIP_CTRL:
|
||||
case TAS6424_CLIP_WINDOW:
|
||||
case TAS6424_CLIP_WARN:
|
||||
case TAS6424_CBC_STAT:
|
||||
case TAS6424_MISC_CTRL4:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static bool tas6424_is_volatile_reg(struct device *dev, unsigned int reg)
|
||||
{
|
||||
switch (reg) {
|
||||
case TAS6424_DC_LOAD_DIAG_REP12:
|
||||
case TAS6424_DC_LOAD_DIAG_REP34:
|
||||
case TAS6424_DC_LOAD_DIAG_REPLO:
|
||||
case TAS6424_CHANNEL_STATE:
|
||||
case TAS6424_CHANNEL_FAULT:
|
||||
case TAS6424_GLOB_FAULT1:
|
||||
case TAS6424_GLOB_FAULT2:
|
||||
case TAS6424_WARN:
|
||||
case TAS6424_AC_LOAD_DIAG_REP1:
|
||||
case TAS6424_AC_LOAD_DIAG_REP2:
|
||||
case TAS6424_AC_LOAD_DIAG_REP3:
|
||||
case TAS6424_AC_LOAD_DIAG_REP4:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct regmap_config tas6424_regmap_config = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
|
||||
.writeable_reg = tas6424_is_writable_reg,
|
||||
.volatile_reg = tas6424_is_volatile_reg,
|
||||
|
||||
.max_register = TAS6424_MAX,
|
||||
.reg_defaults = tas6424_reg_defaults,
|
||||
.num_reg_defaults = ARRAY_SIZE(tas6424_reg_defaults),
|
||||
.cache_type = REGCACHE_RBTREE,
|
||||
};
|
||||
|
||||
#if IS_ENABLED(CONFIG_OF)
|
||||
static const struct of_device_id tas6424_of_ids[] = {
|
||||
{ .compatible = "ti,tas6424", },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, tas6424_of_ids);
|
||||
#endif
|
||||
|
||||
static int tas6424_i2c_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
struct device *dev = &client->dev;
|
||||
struct tas6424_data *tas6424;
|
||||
int ret;
|
||||
int i;
|
||||
|
||||
tas6424 = devm_kzalloc(dev, sizeof(*tas6424), GFP_KERNEL);
|
||||
if (!tas6424)
|
||||
return -ENOMEM;
|
||||
dev_set_drvdata(dev, tas6424);
|
||||
|
||||
tas6424->dev = dev;
|
||||
|
||||
tas6424->regmap = devm_regmap_init_i2c(client, &tas6424_regmap_config);
|
||||
if (IS_ERR(tas6424->regmap)) {
|
||||
ret = PTR_ERR(tas6424->regmap);
|
||||
dev_err(dev, "unable to allocate register map: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(tas6424->supplies); i++)
|
||||
tas6424->supplies[i].supply = tas6424_supply_names[i];
|
||||
ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(tas6424->supplies),
|
||||
tas6424->supplies);
|
||||
if (ret) {
|
||||
dev_err(dev, "unable to request supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(tas6424->supplies),
|
||||
tas6424->supplies);
|
||||
if (ret) {
|
||||
dev_err(dev, "unable to enable supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Reset device to establish well-defined startup state */
|
||||
ret = regmap_update_bits(tas6424->regmap, TAS6424_MODE_CTRL,
|
||||
TAS6424_RESET, TAS6424_RESET);
|
||||
if (ret) {
|
||||
dev_err(dev, "unable to reset device: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
INIT_DELAYED_WORK(&tas6424->fault_check_work, tas6424_fault_check_work);
|
||||
|
||||
ret = snd_soc_register_codec(dev, &soc_codec_dev_tas6424,
|
||||
tas6424_dai, ARRAY_SIZE(tas6424_dai));
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "unable to register codec: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas6424_i2c_remove(struct i2c_client *client)
|
||||
{
|
||||
struct device *dev = &client->dev;
|
||||
struct tas6424_data *tas6424 = dev_get_drvdata(dev);
|
||||
int ret;
|
||||
|
||||
snd_soc_unregister_codec(dev);
|
||||
|
||||
cancel_delayed_work_sync(&tas6424->fault_check_work);
|
||||
|
||||
ret = regulator_bulk_disable(ARRAY_SIZE(tas6424->supplies),
|
||||
tas6424->supplies);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "unable to disable supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id tas6424_i2c_ids[] = {
|
||||
{ "tas6424", 0 },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, tas6424_i2c_ids);
|
||||
|
||||
static struct i2c_driver tas6424_i2c_driver = {
|
||||
.driver = {
|
||||
.name = "tas6424",
|
||||
.of_match_table = of_match_ptr(tas6424_of_ids),
|
||||
},
|
||||
.probe = tas6424_i2c_probe,
|
||||
.remove = tas6424_i2c_remove,
|
||||
.id_table = tas6424_i2c_ids,
|
||||
};
|
||||
module_i2c_driver(tas6424_i2c_driver);
|
||||
|
||||
MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>");
|
||||
MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
|
||||
MODULE_DESCRIPTION("TAS6424 Audio amplifier driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -0,0 +1,144 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* ALSA SoC Texas Instruments TAS6424 Quad-Channel Audio Amplifier
|
||||
*
|
||||
* Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* Author: Andreas Dannenberg <dannenberg@ti.com>
|
||||
* Andrew F. Davis <afd@ti.com>
|
||||
*/
|
||||
|
||||
#ifndef __TAS6424_H__
|
||||
#define __TAS6424_H__
|
||||
|
||||
#define TAS6424_RATES (SNDRV_PCM_RATE_44100 | \
|
||||
SNDRV_PCM_RATE_48000 | \
|
||||
SNDRV_PCM_RATE_96000)
|
||||
|
||||
#define TAS6424_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
|
||||
SNDRV_PCM_FMTBIT_S24_LE)
|
||||
|
||||
/* Register Address Map */
|
||||
#define TAS6424_MODE_CTRL 0x00
|
||||
#define TAS6424_MISC_CTRL1 0x01
|
||||
#define TAS6424_MISC_CTRL2 0x02
|
||||
#define TAS6424_SAP_CTRL 0x03
|
||||
#define TAS6424_CH_STATE_CTRL 0x04
|
||||
#define TAS6424_CH1_VOL_CTRL 0x05
|
||||
#define TAS6424_CH2_VOL_CTRL 0x06
|
||||
#define TAS6424_CH3_VOL_CTRL 0x07
|
||||
#define TAS6424_CH4_VOL_CTRL 0x08
|
||||
#define TAS6424_DC_DIAG_CTRL1 0x09
|
||||
#define TAS6424_DC_DIAG_CTRL2 0x0a
|
||||
#define TAS6424_DC_DIAG_CTRL3 0x0b
|
||||
#define TAS6424_DC_LOAD_DIAG_REP12 0x0c
|
||||
#define TAS6424_DC_LOAD_DIAG_REP34 0x0d
|
||||
#define TAS6424_DC_LOAD_DIAG_REPLO 0x0e
|
||||
#define TAS6424_CHANNEL_STATE 0x0f
|
||||
#define TAS6424_CHANNEL_FAULT 0x10
|
||||
#define TAS6424_GLOB_FAULT1 0x11
|
||||
#define TAS6424_GLOB_FAULT2 0x12
|
||||
#define TAS6424_WARN 0x13
|
||||
#define TAS6424_PIN_CTRL 0x14
|
||||
#define TAS6424_AC_DIAG_CTRL1 0x15
|
||||
#define TAS6424_AC_DIAG_CTRL2 0x16
|
||||
#define TAS6424_AC_LOAD_DIAG_REP1 0x17
|
||||
#define TAS6424_AC_LOAD_DIAG_REP2 0x18
|
||||
#define TAS6424_AC_LOAD_DIAG_REP3 0x19
|
||||
#define TAS6424_AC_LOAD_DIAG_REP4 0x1a
|
||||
#define TAS6424_MISC_CTRL3 0x21
|
||||
#define TAS6424_CLIP_CTRL 0x22
|
||||
#define TAS6424_CLIP_WINDOW 0x23
|
||||
#define TAS6424_CLIP_WARN 0x24
|
||||
#define TAS6424_CBC_STAT 0x25
|
||||
#define TAS6424_MISC_CTRL4 0x26
|
||||
#define TAS6424_MAX TAS6424_MISC_CTRL4
|
||||
|
||||
/* TAS6424_MODE_CTRL_REG */
|
||||
#define TAS6424_RESET BIT(7)
|
||||
|
||||
/* TAS6424_SAP_CTRL_REG */
|
||||
#define TAS6424_SAP_RATE_MASK GENMASK(7, 6)
|
||||
#define TAS6424_SAP_RATE_44100 (0x00 << 6)
|
||||
#define TAS6424_SAP_RATE_48000 (0x01 << 6)
|
||||
#define TAS6424_SAP_RATE_96000 (0x02 << 6)
|
||||
#define TAS6424_SAP_TDM_SLOT_LAST BIT(5)
|
||||
#define TAS6424_SAP_TDM_SLOT_SZ_16 BIT(4)
|
||||
#define TAS6424_SAP_TDM_SLOT_SWAP BIT(3)
|
||||
#define TAS6424_SAP_FMT_MASK GENMASK(2, 0)
|
||||
#define TAS6424_SAP_RIGHTJ_24 (0x00 << 0)
|
||||
#define TAS6424_SAP_RIGHTJ_20 (0x01 << 0)
|
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#define TAS6424_SAP_RIGHTJ_18 (0x02 << 0)
|
||||
#define TAS6424_SAP_RIGHTJ_16 (0x03 << 0)
|
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#define TAS6424_SAP_I2S (0x04 << 0)
|
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#define TAS6424_SAP_LEFTJ (0x05 << 0)
|
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#define TAS6424_SAP_DSP (0x06 << 0)
|
||||
|
||||
/* TAS6424_CH_STATE_CTRL_REG */
|
||||
#define TAS6424_CH1_STATE_MASK GENMASK(7, 6)
|
||||
#define TAS6424_CH1_STATE_PLAY (0x00 << 6)
|
||||
#define TAS6424_CH1_STATE_HIZ (0x01 << 6)
|
||||
#define TAS6424_CH1_STATE_MUTE (0x02 << 6)
|
||||
#define TAS6424_CH1_STATE_DIAG (0x03 << 6)
|
||||
#define TAS6424_CH2_STATE_MASK GENMASK(5, 4)
|
||||
#define TAS6424_CH2_STATE_PLAY (0x00 << 4)
|
||||
#define TAS6424_CH2_STATE_HIZ (0x01 << 4)
|
||||
#define TAS6424_CH2_STATE_MUTE (0x02 << 4)
|
||||
#define TAS6424_CH2_STATE_DIAG (0x03 << 4)
|
||||
#define TAS6424_CH3_STATE_MASK GENMASK(3, 2)
|
||||
#define TAS6424_CH3_STATE_PLAY (0x00 << 2)
|
||||
#define TAS6424_CH3_STATE_HIZ (0x01 << 2)
|
||||
#define TAS6424_CH3_STATE_MUTE (0x02 << 2)
|
||||
#define TAS6424_CH3_STATE_DIAG (0x03 << 2)
|
||||
#define TAS6424_CH4_STATE_MASK GENMASK(1, 0)
|
||||
#define TAS6424_CH4_STATE_PLAY (0x00 << 0)
|
||||
#define TAS6424_CH4_STATE_HIZ (0x01 << 0)
|
||||
#define TAS6424_CH4_STATE_MUTE (0x02 << 0)
|
||||
#define TAS6424_CH4_STATE_DIAG (0x03 << 0)
|
||||
#define TAS6424_ALL_STATE_PLAY (TAS6424_CH1_STATE_PLAY | \
|
||||
TAS6424_CH2_STATE_PLAY | \
|
||||
TAS6424_CH3_STATE_PLAY | \
|
||||
TAS6424_CH4_STATE_PLAY)
|
||||
#define TAS6424_ALL_STATE_HIZ (TAS6424_CH1_STATE_HIZ | \
|
||||
TAS6424_CH2_STATE_HIZ | \
|
||||
TAS6424_CH3_STATE_HIZ | \
|
||||
TAS6424_CH4_STATE_HIZ)
|
||||
#define TAS6424_ALL_STATE_MUTE (TAS6424_CH1_STATE_MUTE | \
|
||||
TAS6424_CH2_STATE_MUTE | \
|
||||
TAS6424_CH3_STATE_MUTE | \
|
||||
TAS6424_CH4_STATE_MUTE)
|
||||
#define TAS6424_ALL_STATE_DIAG (TAS6424_CH1_STATE_DIAG | \
|
||||
TAS6424_CH2_STATE_DIAG | \
|
||||
TAS6424_CH3_STATE_DIAG | \
|
||||
TAS6424_CH4_STATE_DIAG)
|
||||
|
||||
/* TAS6424_GLOB_FAULT1_REG */
|
||||
#define TAS6424_FAULT_CLOCK BIT(4)
|
||||
#define TAS6424_FAULT_PVDD_OV BIT(3)
|
||||
#define TAS6424_FAULT_VBAT_OV BIT(2)
|
||||
#define TAS6424_FAULT_PVDD_UV BIT(1)
|
||||
#define TAS6424_FAULT_VBAT_UV BIT(0)
|
||||
|
||||
/* TAS6424_GLOB_FAULT2_REG */
|
||||
#define TAS6424_FAULT_OTSD BIT(4)
|
||||
#define TAS6424_FAULT_OTSD_CH1 BIT(3)
|
||||
#define TAS6424_FAULT_OTSD_CH2 BIT(2)
|
||||
#define TAS6424_FAULT_OTSD_CH3 BIT(1)
|
||||
#define TAS6424_FAULT_OTSD_CH4 BIT(0)
|
||||
|
||||
/* TAS6424_WARN_REG */
|
||||
#define TAS6424_WARN_VDD_UV BIT(6)
|
||||
#define TAS6424_WARN_VDD_POR BIT(5)
|
||||
#define TAS6424_WARN_VDD_OTW BIT(4)
|
||||
#define TAS6424_WARN_VDD_OTW_CH1 BIT(3)
|
||||
#define TAS6424_WARN_VDD_OTW_CH2 BIT(2)
|
||||
#define TAS6424_WARN_VDD_OTW_CH3 BIT(1)
|
||||
#define TAS6424_WARN_VDD_OTW_CH4 BIT(0)
|
||||
|
||||
/* TAS6424_MISC_CTRL3_REG */
|
||||
#define TAS6424_CLEAR_FAULT BIT(7)
|
||||
#define TAS6424_PBTL_CH_SEL BIT(6)
|
||||
#define TAS6424_MASK_CBC_WARN BIT(5)
|
||||
#define TAS6424_MASK_VDD_UV BIT(4)
|
||||
#define TAS6424_OTSD_AUTO_RECOVERY BIT(3)
|
||||
|
||||
#endif /* __TAS6424_H__ */
|
||||
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Reference in New Issue