clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock
The condition passed to read*_poll_timeout() is the break condition,
i.e. wait for this condition to happen and return success.
The original code assumed the opposite, resulting in a warning when
the PLL clock rate was changed but never lost it's lock as far as
the readout indicated. This was verified by checking the read out
register value.
Fixes: 1d80c14248
("clk: sunxi-ng: Add common infrastructure")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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@ -31,7 +31,7 @@ void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock)
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return;
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return;
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WARN_ON(readl_relaxed_poll_timeout(common->base + common->reg, reg,
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WARN_ON(readl_relaxed_poll_timeout(common->base + common->reg, reg,
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!(reg & lock), 100, 70000));
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reg & lock, 100, 70000));
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}
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}
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int sunxi_ccu_probe(struct device_node *node, void __iomem *reg,
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int sunxi_ccu_probe(struct device_node *node, void __iomem *reg,
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