[media] ARM: davinci: da850: Add SoC related definitions for VPIF
Add clock, pin mux definitions and registration function for VPIF capture and display driver on DA850/OMAP-L138 SoC. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Acked-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Manjunath Hadli
Mauro Carvalho Chehab
parent
f4ad8d74e1
commit
154d54a8ce
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@ -347,6 +347,13 @@ static struct clk spi1_clk = {
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.flags = DA850_CLK_ASYNC3,
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};
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static struct clk vpif_clk = {
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.name = "vpif",
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.parent = &pll0_sysclk2,
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.lpsc = DA850_LPSC1_VPIF,
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.gpsc = 1,
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};
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static struct clk sata_clk = {
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.name = "sata",
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.parent = &pll0_sysclk2,
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@ -397,6 +404,7 @@ static struct clk_lookup da850_clks[] = {
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CLK(NULL, "usb20", &usb20_clk),
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CLK("spi_davinci.0", NULL, &spi0_clk),
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CLK("spi_davinci.1", NULL, &spi1_clk),
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CLK("vpif", NULL, &vpif_clk),
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CLK("ahci", NULL, &sata_clk),
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CLK(NULL, NULL, NULL),
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};
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@ -573,6 +581,46 @@ static const struct mux_config da850_pins[] = {
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MUX_CFG(DA850, GPIO6_10, 13, 20, 15, 8, false)
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MUX_CFG(DA850, GPIO6_13, 13, 8, 15, 8, false)
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MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false)
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/* VPIF Capture */
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MUX_CFG(DA850, VPIF_DIN0, 15, 4, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN1, 15, 0, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN2, 14, 28, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN3, 14, 24, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN4, 14, 20, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN5, 14, 16, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN6, 14, 12, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN7, 14, 8, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN8, 16, 4, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN9, 16, 0, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN10, 15, 28, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN11, 15, 24, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN12, 15, 20, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN13, 15, 16, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN14, 15, 12, 15, 1, false)
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MUX_CFG(DA850, VPIF_DIN15, 15, 8, 15, 1, false)
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MUX_CFG(DA850, VPIF_CLKIN0, 14, 0, 15, 1, false)
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MUX_CFG(DA850, VPIF_CLKIN1, 14, 4, 15, 1, false)
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MUX_CFG(DA850, VPIF_CLKIN2, 19, 8, 15, 1, false)
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MUX_CFG(DA850, VPIF_CLKIN3, 19, 16, 15, 1, false)
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/* VPIF Display */
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MUX_CFG(DA850, VPIF_DOUT0, 17, 4, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT1, 17, 0, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT2, 16, 28, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT3, 16, 24, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT4, 16, 20, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT5, 16, 16, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT6, 16, 12, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT7, 16, 8, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT8, 18, 4, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT9, 18, 0, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT10, 17, 28, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT11, 17, 24, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT12, 17, 20, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT13, 17, 16, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT14, 17, 12, 15, 1, false)
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MUX_CFG(DA850, VPIF_DOUT15, 17, 8, 15, 1, false)
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MUX_CFG(DA850, VPIF_CLKO2, 19, 12, 15, 1, false)
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MUX_CFG(DA850, VPIF_CLKO3, 19, 20, 15, 1, false)
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#endif
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};
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@ -595,6 +643,26 @@ const short da850_lcdcntl_pins[] __initdata = {
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-1
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};
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const short da850_vpif_capture_pins[] __initdata = {
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DA850_VPIF_DIN0, DA850_VPIF_DIN1, DA850_VPIF_DIN2, DA850_VPIF_DIN3,
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DA850_VPIF_DIN4, DA850_VPIF_DIN5, DA850_VPIF_DIN6, DA850_VPIF_DIN7,
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DA850_VPIF_DIN8, DA850_VPIF_DIN9, DA850_VPIF_DIN10, DA850_VPIF_DIN11,
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DA850_VPIF_DIN12, DA850_VPIF_DIN13, DA850_VPIF_DIN14, DA850_VPIF_DIN15,
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DA850_VPIF_CLKIN0, DA850_VPIF_CLKIN1, DA850_VPIF_CLKIN2,
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DA850_VPIF_CLKIN3,
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-1
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};
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const short da850_vpif_display_pins[] __initdata = {
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DA850_VPIF_DOUT0, DA850_VPIF_DOUT1, DA850_VPIF_DOUT2, DA850_VPIF_DOUT3,
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DA850_VPIF_DOUT4, DA850_VPIF_DOUT5, DA850_VPIF_DOUT6, DA850_VPIF_DOUT7,
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DA850_VPIF_DOUT8, DA850_VPIF_DOUT9, DA850_VPIF_DOUT10,
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DA850_VPIF_DOUT11, DA850_VPIF_DOUT12, DA850_VPIF_DOUT13,
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DA850_VPIF_DOUT14, DA850_VPIF_DOUT15, DA850_VPIF_CLKO2,
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DA850_VPIF_CLKO3,
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-1
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};
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/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
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static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
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[IRQ_DA8XX_COMMTX] = 7,
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@ -1064,6 +1132,90 @@ no_ddrpll_mem:
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return ret;
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}
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/* VPIF resource, platform data */
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static u64 da850_vpif_dma_mask = DMA_BIT_MASK(32);
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static struct resource da850_vpif_resource[] = {
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{
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.start = DA8XX_VPIF_BASE,
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.end = DA8XX_VPIF_BASE + 0xfff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device da850_vpif_dev = {
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.name = "vpif",
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.id = -1,
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.dev = {
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.dma_mask = &da850_vpif_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.resource = da850_vpif_resource,
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.num_resources = ARRAY_SIZE(da850_vpif_resource),
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};
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static struct resource da850_vpif_display_resource[] = {
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{
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.start = IRQ_DA850_VPIFINT,
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.end = IRQ_DA850_VPIFINT,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device da850_vpif_display_dev = {
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.name = "vpif_display",
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.id = -1,
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.dev = {
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.dma_mask = &da850_vpif_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.resource = da850_vpif_display_resource,
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.num_resources = ARRAY_SIZE(da850_vpif_display_resource),
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};
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static struct resource da850_vpif_capture_resource[] = {
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{
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.start = IRQ_DA850_VPIFINT,
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.end = IRQ_DA850_VPIFINT,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_DA850_VPIFINT,
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.end = IRQ_DA850_VPIFINT,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device da850_vpif_capture_dev = {
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.name = "vpif_capture",
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.id = -1,
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.dev = {
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.dma_mask = &da850_vpif_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.resource = da850_vpif_capture_resource,
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.num_resources = ARRAY_SIZE(da850_vpif_capture_resource),
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};
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int __init da850_register_vpif(void)
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{
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return platform_device_register(&da850_vpif_dev);
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}
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int __init da850_register_vpif_display(struct vpif_display_config
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*display_config)
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{
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da850_vpif_display_dev.dev.platform_data = display_config;
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return platform_device_register(&da850_vpif_display_dev);
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}
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int __init da850_register_vpif_capture(struct vpif_capture_config
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*capture_config)
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{
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da850_vpif_capture_dev.dev.platform_data = capture_config;
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return platform_device_register(&da850_vpif_capture_dev);
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}
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static struct davinci_soc_info davinci_soc_info_da850 = {
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.io_desc = da850_io_desc,
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.io_desc_num = ARRAY_SIZE(da850_io_desc),
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@ -16,6 +16,7 @@
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#include <linux/platform_device.h>
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#include <linux/davinci_emac.h>
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#include <linux/spi/spi.h>
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#include <linux/videodev2.h>
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#include <mach/serial.h>
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#include <mach/edma.h>
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@ -26,6 +27,8 @@
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#include <mach/pm.h>
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#include <mach/spi.h>
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#include <media/davinci/vpif_types.h>
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extern void __iomem *da8xx_syscfg0_base;
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extern void __iomem *da8xx_syscfg1_base;
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@ -63,6 +66,7 @@ extern unsigned int da850_max_speed;
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#define DA8XX_PLL0_BASE 0x01c11000
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#define DA8XX_TIMER64P0_BASE 0x01c20000
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#define DA8XX_TIMER64P1_BASE 0x01c21000
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#define DA8XX_VPIF_BASE 0x01e17000
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#define DA8XX_GPIO_BASE 0x01e26000
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#define DA8XX_PSC1_BASE 0x01e27000
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#define DA8XX_AEMIF_CS2_BASE 0x60000000
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@ -92,6 +96,11 @@ int da8xx_register_cpuidle(void);
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void __iomem * __init da8xx_get_mem_ctlr(void);
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int da850_register_pm(struct platform_device *pdev);
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int __init da850_register_sata(unsigned long refclkpn);
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int __init da850_register_vpif(void);
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int __init da850_register_vpif_display
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(struct vpif_display_config *display_config);
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int __init da850_register_vpif_capture
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(struct vpif_capture_config *capture_config);
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void da8xx_restart(char mode, const char *cmd);
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extern struct platform_device da8xx_serial_device;
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@ -126,6 +135,8 @@ extern const short da830_ecap1_pins[];
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extern const short da830_ecap2_pins[];
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extern const short da830_eqep0_pins[];
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extern const short da830_eqep1_pins[];
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extern const short da850_vpif_capture_pins[];
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extern const short da850_vpif_display_pins[];
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extern const short da850_i2c0_pins[];
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extern const short da850_i2c1_pins[];
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@ -928,6 +928,48 @@ enum davinci_da850_index {
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DA850_GPIO6_10,
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DA850_GPIO6_13,
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DA850_RTC_ALARM,
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/* VPIF Capture */
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DA850_VPIF_DIN0,
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DA850_VPIF_DIN1,
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DA850_VPIF_DIN2,
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DA850_VPIF_DIN3,
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DA850_VPIF_DIN4,
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DA850_VPIF_DIN5,
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DA850_VPIF_DIN6,
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DA850_VPIF_DIN7,
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DA850_VPIF_DIN8,
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DA850_VPIF_DIN9,
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DA850_VPIF_DIN10,
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DA850_VPIF_DIN11,
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DA850_VPIF_DIN12,
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DA850_VPIF_DIN13,
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DA850_VPIF_DIN14,
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DA850_VPIF_DIN15,
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DA850_VPIF_CLKIN0,
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DA850_VPIF_CLKIN1,
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DA850_VPIF_CLKIN2,
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DA850_VPIF_CLKIN3,
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/* VPIF Display */
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DA850_VPIF_DOUT0,
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DA850_VPIF_DOUT1,
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DA850_VPIF_DOUT2,
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DA850_VPIF_DOUT3,
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DA850_VPIF_DOUT4,
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DA850_VPIF_DOUT5,
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DA850_VPIF_DOUT6,
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DA850_VPIF_DOUT7,
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DA850_VPIF_DOUT8,
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DA850_VPIF_DOUT9,
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DA850_VPIF_DOUT10,
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DA850_VPIF_DOUT11,
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DA850_VPIF_DOUT12,
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DA850_VPIF_DOUT13,
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DA850_VPIF_DOUT14,
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DA850_VPIF_DOUT15,
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DA850_VPIF_CLKO2,
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DA850_VPIF_CLKO3,
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};
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enum davinci_tnetv107x_index {
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@ -166,6 +166,7 @@
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#define DA830_LPSC1_McASP1 8
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#define DA850_LPSC1_SATA 8
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#define DA830_LPSC1_McASP2 9
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#define DA850_LPSC1_VPIF 9
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#define DA8XX_LPSC1_SPI1 10
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#define DA8XX_LPSC1_I2C 11
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#define DA8XX_LPSC1_UART1 12
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