ARM: 7553/1: proc-v7: Ensure correct instruction set after cpu_reset
Because mov pc,<Rn> never switches instruction set when executed in Thumb code, Thumb-2 kernels will silently execute the target code after cpu_reset as Thumb code, even if the passed code pointer denotes ARM (bit 0 clear). This patch uses bx instead, ensuring the correct instruction set for the target code. Thumb code in the kernel is not supported prior to ARMv7, so other CPUs are not affected. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
parent
ddffeb8c4d
commit
153cd8e839
|
@ -57,7 +57,7 @@ ENTRY(cpu_v7_reset)
|
|||
THUMB( bic r1, r1, #1 << 30 ) @ SCTLR.TE (Thumb exceptions)
|
||||
mcr p15, 0, r1, c1, c0, 0 @ disable MMU
|
||||
isb
|
||||
mov pc, r0
|
||||
bx r0
|
||||
ENDPROC(cpu_v7_reset)
|
||||
.popsection
|
||||
|
||||
|
|
Loading…
Reference in New Issue