ASoC: wm8737: Fixup setting VMID Impedance control register
According to the datasheet: R10 (0Ah) VMID Impedance Control BIT 3:2 VMIDSEL DEFAULT 00 DESCRIPTION: VMID impedance selection control 00: 75kΩ output 01: 300kΩ output 10: 2.5kΩ output WM8737_VMIDSEL_MASK is 0xC (VMIDSEL - [3:2]), so it needs to left shift WM8737_VMIDSEL_SHIFT bits for setting these bits. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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@ -483,7 +483,8 @@ static int wm8737_set_bias_level(struct snd_soc_codec *codec,
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/* Fast VMID ramp at 2*2.5k */
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snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
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WM8737_VMIDSEL_MASK, 0x4);
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WM8737_VMIDSEL_MASK,
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2 << WM8737_VMIDSEL_SHIFT);
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/* Bring VMID up */
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snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
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@ -497,7 +498,8 @@ static int wm8737_set_bias_level(struct snd_soc_codec *codec,
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/* VMID at 2*300k */
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snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
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WM8737_VMIDSEL_MASK, 2);
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WM8737_VMIDSEL_MASK,
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1 << WM8737_VMIDSEL_SHIFT);
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break;
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