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ARM: tegra: clock: Don't BUG on changing an enabled PLL 

When updating the CPU PLL frequency, keeping the PLL enabled avoids
ramping the PLL all the way down and back up again.  Remove the BUG_ON
in tegra2_pll_clk_set_rate to allow the rate to change while the PLL
is enabled.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Colin Cross <ccross@android.com>
This commit is contained in:
Colin Cross 2010-09-08 19:41:58 -07:00
parent 2b84cb4faa
commit 14133add42
1 changed files with 0 additions and 1 deletions
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1
arch/arm/mach-tegra/tegra2_clocks.c
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@ -620,7 +620,6 @@ static int tegra2_pll_clk_set_rate(struct clk *c, unsigned long rate)
const struct clk_pll_table *sel;
pr_debug("%s: %s %lu\n", __func__, c->name, rate);
BUG_ON(c->refcnt != 0);
input_rate = c->parent->rate;
for (sel = c->pll_table; sel->input_rate != 0; sel++) {