[media] cx25821-medusa-video.c: Change line endings
Change obscure line endings to less obscure ones. (improve readability) Signed-off-by: Leonid V. Fedorenchik <leonidsbox@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Leonid V. Fedorenchik
Mauro Carvalho Chehab
parent
49faae869f
commit
14098bc730
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@ -99,82 +99,67 @@ static int medusa_initialize_ntsc(struct cx25821_dev *dev)
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for (i = 0; i < MAX_DECODERS; i++) {
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/* set video format NTSC-M */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0], MODE_CTRL + (0x200 * i),
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&tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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MODE_CTRL + (0x200 * i), &tmp);
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value &= 0xFFFFFFF0;
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/* enable the fast locking mode bit[16] */
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value |= 0x10001;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0], MODE_CTRL + (0x200 * i),
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value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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MODE_CTRL + (0x200 * i), value);
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/* resolution NTSC 720x480 */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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HORIZ_TIM_CTRL + (0x200 * i), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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HORIZ_TIM_CTRL + (0x200 * i), &tmp);
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value &= 0x00C00C00;
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value |= 0x612D0074;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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HORIZ_TIM_CTRL + (0x200 * i), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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HORIZ_TIM_CTRL + (0x200 * i), value);
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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VERT_TIM_CTRL + (0x200 * i), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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VERT_TIM_CTRL + (0x200 * i), &tmp);
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value &= 0x00C00C00;
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value |= 0x1C1E001A; /* vblank_cnt + 2 to get camera ID */
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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VERT_TIM_CTRL + (0x200 * i), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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VERT_TIM_CTRL + (0x200 * i), value);
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/* chroma subcarrier step size */
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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SC_STEP_SIZE + (0x200 * i), 0x43E00000);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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SC_STEP_SIZE + (0x200 * i), 0x43E00000);
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/* enable VIP optional active */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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OUT_CTRL_NS + (0x200 * i), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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OUT_CTRL_NS + (0x200 * i), &tmp);
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value &= 0xFFFBFFFF;
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value |= 0x00040000;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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OUT_CTRL_NS + (0x200 * i), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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OUT_CTRL_NS + (0x200 * i), value);
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/* enable VIP optional active (VIP_OPT_AL) for direct output. */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0], OUT_CTRL1 + (0x200 * i),
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&tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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OUT_CTRL1 + (0x200 * i), &tmp);
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value &= 0xFFFBFFFF;
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value |= 0x00040000;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0], OUT_CTRL1 + (0x200 * i),
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value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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OUT_CTRL1 + (0x200 * i), value);
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/*
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* clear VPRES_VERT_EN bit, fixes the chroma run away problem
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* when the input switching rate < 16 fields
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*/
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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MISC_TIM_CTRL + (0x200 * i), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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MISC_TIM_CTRL + (0x200 * i), &tmp);
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/* disable special play detection */
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value = setBitAtPos(value, 14);
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value = clearBitAtPos(value, 15);
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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MISC_TIM_CTRL + (0x200 * i), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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MISC_TIM_CTRL + (0x200 * i), value);
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/* set vbi_gate_en to 0 */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0], DFE_CTRL1 + (0x200 * i),
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&tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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DFE_CTRL1 + (0x200 * i), &tmp);
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value = clearBitAtPos(value, 29);
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0], DFE_CTRL1 + (0x200 * i),
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value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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DFE_CTRL1 + (0x200 * i), value);
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/* Enable the generation of blue field output if no video */
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medusa_enable_bluefield_output(dev, i, 1);
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@ -182,61 +167,49 @@ static int medusa_initialize_ntsc(struct cx25821_dev *dev)
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for (i = 0; i < MAX_ENCODERS; i++) {
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/* NTSC hclock */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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DENC_A_REG_1 + (0x100 * i), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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DENC_A_REG_1 + (0x100 * i), &tmp);
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value &= 0xF000FC00;
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value |= 0x06B402D0;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_1 + (0x100 * i), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_1 + (0x100 * i), value);
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/* burst begin and burst end */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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DENC_A_REG_2 + (0x100 * i), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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DENC_A_REG_2 + (0x100 * i), &tmp);
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value &= 0xFF000000;
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value |= 0x007E9054;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_2 + (0x100 * i), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_2 + (0x100 * i), value);
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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DENC_A_REG_3 + (0x100 * i), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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DENC_A_REG_3 + (0x100 * i), &tmp);
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value &= 0xFC00FE00;
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value |= 0x00EC00F0;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_3 + (0x100 * i), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_3 + (0x100 * i), value);
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/* set NTSC vblank, no phase alternation, 7.5 IRE pedestal */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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DENC_A_REG_4 + (0x100 * i), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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DENC_A_REG_4 + (0x100 * i), &tmp);
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value &= 0x00FCFFFF;
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value |= 0x13020000;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_4 + (0x100 * i), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_4 + (0x100 * i), value);
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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DENC_A_REG_5 + (0x100 * i), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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DENC_A_REG_5 + (0x100 * i), &tmp);
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value &= 0xFFFF0000;
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value |= 0x0000E575;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_5 + (0x100 * i), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_5 + (0x100 * i), value);
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_6 + (0x100 * i), 0x009A89C1);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_6 + (0x100 * i), 0x009A89C1);
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/* Subcarrier Increment */
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_7 + (0x100 * i), 0x21F07C1F);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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DENC_A_REG_7 + (0x100 * i), 0x21F07C1F);
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}
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/* set picture resolutions */
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@ -261,34 +234,27 @@ static int medusa_PALCombInit(struct cx25821_dev *dev, int dec)
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u32 value = 0, tmp = 0;
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/* Setup for 2D threshold */
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0], COMB_2D_HFS_CFG + (0x200 * dec),
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0x20002861);
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0], COMB_2D_HFD_CFG + (0x200 * dec),
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0x20002861);
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0], COMB_2D_LF_CFG + (0x200 * dec),
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0x200A1023);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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COMB_2D_HFS_CFG + (0x200 * dec), 0x20002861);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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COMB_2D_HFD_CFG + (0x200 * dec), 0x20002861);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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COMB_2D_LF_CFG + (0x200 * dec), 0x200A1023);
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/* Setup flat chroma and luma thresholds */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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COMB_FLAT_THRESH_CTRL + (0x200 * dec), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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COMB_FLAT_THRESH_CTRL + (0x200 * dec), &tmp);
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value &= 0x06230000;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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COMB_FLAT_THRESH_CTRL + (0x200 * dec), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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COMB_FLAT_THRESH_CTRL + (0x200 * dec), value);
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/* set comb 2D blend */
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0], COMB_2D_BLEND + (0x200 * dec),
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0x210F0F0F);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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COMB_2D_BLEND + (0x200 * dec), 0x210F0F0F);
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/* COMB MISC CONTROL */
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0], COMB_MISC_CTRL + (0x200 * dec),
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0x41120A7F);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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COMB_MISC_CTRL + (0x200 * dec), 0x41120A7F);
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return ret_val;
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}
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@ -304,83 +270,68 @@ static int medusa_initialize_pal(struct cx25821_dev *dev)
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for (i = 0; i < MAX_DECODERS; i++) {
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/* set video format PAL-BDGHI */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0], MODE_CTRL + (0x200 * i),
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&tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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MODE_CTRL + (0x200 * i), &tmp);
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value &= 0xFFFFFFF0;
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/* enable the fast locking mode bit[16] */
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value |= 0x10004;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0], MODE_CTRL + (0x200 * i),
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value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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MODE_CTRL + (0x200 * i), value);
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/* resolution PAL 720x576 */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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HORIZ_TIM_CTRL + (0x200 * i), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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HORIZ_TIM_CTRL + (0x200 * i), &tmp);
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value &= 0x00C00C00;
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value |= 0x632D007D;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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HORIZ_TIM_CTRL + (0x200 * i), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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HORIZ_TIM_CTRL + (0x200 * i), value);
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/* vblank656_cnt=x26, vactive_cnt=240h, vblank_cnt=x24 */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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VERT_TIM_CTRL + (0x200 * i), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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VERT_TIM_CTRL + (0x200 * i), &tmp);
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value &= 0x00C00C00;
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value |= 0x28240026; /* vblank_cnt + 2 to get camera ID */
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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VERT_TIM_CTRL + (0x200 * i), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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VERT_TIM_CTRL + (0x200 * i), value);
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/* chroma subcarrier step size */
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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SC_STEP_SIZE + (0x200 * i), 0x5411E2D0);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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SC_STEP_SIZE + (0x200 * i), 0x5411E2D0);
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/* enable VIP optional active */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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OUT_CTRL_NS + (0x200 * i), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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OUT_CTRL_NS + (0x200 * i), &tmp);
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value &= 0xFFFBFFFF;
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value |= 0x00040000;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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OUT_CTRL_NS + (0x200 * i), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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OUT_CTRL_NS + (0x200 * i), value);
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/* enable VIP optional active (VIP_OPT_AL) for direct output. */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0], OUT_CTRL1 + (0x200 * i),
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&tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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OUT_CTRL1 + (0x200 * i), &tmp);
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value &= 0xFFFBFFFF;
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value |= 0x00040000;
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0], OUT_CTRL1 + (0x200 * i),
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value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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OUT_CTRL1 + (0x200 * i), value);
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/*
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* clear VPRES_VERT_EN bit, fixes the chroma run away problem
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* when the input switching rate < 16 fields
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*/
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value =
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cx25821_i2c_read(&dev->i2c_bus[0],
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MISC_TIM_CTRL + (0x200 * i), &tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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MISC_TIM_CTRL + (0x200 * i), &tmp);
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/* disable special play detection */
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value = setBitAtPos(value, 14);
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value = clearBitAtPos(value, 15);
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0],
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MISC_TIM_CTRL + (0x200 * i), value);
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ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
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MISC_TIM_CTRL + (0x200 * i), value);
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/* set vbi_gate_en to 0 */
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value =
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cx25821_i2c_read(&dev->i2c_bus[0], DFE_CTRL1 + (0x200 * i),
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&tmp);
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value = cx25821_i2c_read(&dev->i2c_bus[0],
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DFE_CTRL1 + (0x200 * i), &tmp);
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value = clearBitAtPos(value, 29);
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ret_val =
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cx25821_i2c_write(&dev->i2c_bus[0], DFE_CTRL1 + (0x200 * i),
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value);
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||||
ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DFE_CTRL1 + (0x200 * i), value);
|
||||
|
||||
medusa_PALCombInit(dev, i);
|
||||
|
||||
|
|
@ -390,62 +341,50 @@ static int medusa_initialize_pal(struct cx25821_dev *dev)
|
|||
|
||||
for (i = 0; i < MAX_ENCODERS; i++) {
|
||||
/* PAL hclock */
|
||||
value =
|
||||
cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
DENC_A_REG_1 + (0x100 * i), &tmp);
|
||||
value = cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
DENC_A_REG_1 + (0x100 * i), &tmp);
|
||||
value &= 0xF000FC00;
|
||||
value |= 0x06C002D0;
|
||||
ret_val =
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_1 + (0x100 * i), value);
|
||||
ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_1 + (0x100 * i), value);
|
||||
|
||||
/* burst begin and burst end */
|
||||
value =
|
||||
cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
DENC_A_REG_2 + (0x100 * i), &tmp);
|
||||
value = cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
DENC_A_REG_2 + (0x100 * i), &tmp);
|
||||
value &= 0xFF000000;
|
||||
value |= 0x007E9754;
|
||||
ret_val =
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_2 + (0x100 * i), value);
|
||||
ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_2 + (0x100 * i), value);
|
||||
|
||||
/* hblank and vactive */
|
||||
value =
|
||||
cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
DENC_A_REG_3 + (0x100 * i), &tmp);
|
||||
value = cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
DENC_A_REG_3 + (0x100 * i), &tmp);
|
||||
value &= 0xFC00FE00;
|
||||
value |= 0x00FC0120;
|
||||
ret_val =
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_3 + (0x100 * i), value);
|
||||
ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_3 + (0x100 * i), value);
|
||||
|
||||
/* set PAL vblank, phase alternation, 0 IRE pedestal */
|
||||
value =
|
||||
cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
DENC_A_REG_4 + (0x100 * i), &tmp);
|
||||
value = cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
DENC_A_REG_4 + (0x100 * i), &tmp);
|
||||
value &= 0x00FCFFFF;
|
||||
value |= 0x14010000;
|
||||
ret_val =
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_4 + (0x100 * i), value);
|
||||
ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_4 + (0x100 * i), value);
|
||||
|
||||
value =
|
||||
cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
DENC_A_REG_5 + (0x100 * i), &tmp);
|
||||
value = cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
DENC_A_REG_5 + (0x100 * i), &tmp);
|
||||
value &= 0xFFFF0000;
|
||||
value |= 0x0000F078;
|
||||
ret_val =
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_5 + (0x100 * i), value);
|
||||
ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_5 + (0x100 * i), value);
|
||||
|
||||
ret_val =
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_6 + (0x100 * i), 0x00A493CF);
|
||||
ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_6 + (0x100 * i), 0x00A493CF);
|
||||
|
||||
/* Subcarrier Increment */
|
||||
ret_val =
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_7 + (0x100 * i), 0x2A098ACB);
|
||||
ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
DENC_A_REG_7 + (0x100 * i), 0x2A098ACB);
|
||||
}
|
||||
|
||||
/* set picture resolutions */
|
||||
|
|
@ -543,12 +482,10 @@ void medusa_set_resolution(struct cx25821_dev *dev, int width,
|
|||
|
||||
for (; decoder < decoder_count; decoder++) {
|
||||
/* write scaling values for each decoder */
|
||||
ret_val =
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
HSCALE_CTRL + (0x200 * decoder), hscale);
|
||||
ret_val =
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
VSCALE_CTRL + (0x200 * decoder), vscale);
|
||||
ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
HSCALE_CTRL + (0x200 * decoder), hscale);
|
||||
ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
VSCALE_CTRL + (0x200 * decoder), vscale);
|
||||
}
|
||||
|
||||
mutex_unlock(&dev->lock);
|
||||
|
|
@ -606,8 +543,8 @@ static void medusa_set_decoderduration(struct cx25821_dev *dev, int decoder,
|
|||
}
|
||||
|
||||
/* Map to Medusa register setting */
|
||||
static int mapM(int srcMin,
|
||||
int srcMax, int srcVal, int dstMin, int dstMax, int *dstVal)
|
||||
static int mapM(int srcMin, int srcMax, int srcVal, int dstMin, int dstMax,
|
||||
int *dstVal)
|
||||
{
|
||||
int numerator;
|
||||
int denominator;
|
||||
|
|
@ -659,18 +596,14 @@ int medusa_set_brightness(struct cx25821_dev *dev, int brightness, int decoder)
|
|||
mutex_unlock(&dev->lock);
|
||||
return -1;
|
||||
}
|
||||
ret_val =
|
||||
mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, brightness,
|
||||
SIGNED_BYTE_MIN, SIGNED_BYTE_MAX, &value);
|
||||
ret_val = mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, brightness,
|
||||
SIGNED_BYTE_MIN, SIGNED_BYTE_MAX, &value);
|
||||
value = convert_to_twos(value, 8);
|
||||
val =
|
||||
cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
VDEC_A_BRITE_CTRL + (0x200 * decoder), &tmp);
|
||||
val = cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
VDEC_A_BRITE_CTRL + (0x200 * decoder), &tmp);
|
||||
val &= 0xFFFFFF00;
|
||||
ret_val |=
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
VDEC_A_BRITE_CTRL + (0x200 * decoder),
|
||||
val | value);
|
||||
ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
VDEC_A_BRITE_CTRL + (0x200 * decoder), val | value);
|
||||
mutex_unlock(&dev->lock);
|
||||
return ret_val;
|
||||
}
|
||||
|
|
@ -688,17 +621,13 @@ int medusa_set_contrast(struct cx25821_dev *dev, int contrast, int decoder)
|
|||
return -1;
|
||||
}
|
||||
|
||||
ret_val =
|
||||
mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, contrast,
|
||||
UNSIGNED_BYTE_MIN, UNSIGNED_BYTE_MAX, &value);
|
||||
val =
|
||||
cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
VDEC_A_CNTRST_CTRL + (0x200 * decoder), &tmp);
|
||||
ret_val = mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, contrast,
|
||||
UNSIGNED_BYTE_MIN, UNSIGNED_BYTE_MAX, &value);
|
||||
val = cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
VDEC_A_CNTRST_CTRL + (0x200 * decoder), &tmp);
|
||||
val &= 0xFFFFFF00;
|
||||
ret_val |=
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
VDEC_A_CNTRST_CTRL + (0x200 * decoder),
|
||||
val | value);
|
||||
ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
VDEC_A_CNTRST_CTRL + (0x200 * decoder), val | value);
|
||||
|
||||
mutex_unlock(&dev->lock);
|
||||
return ret_val;
|
||||
|
|
@ -717,19 +646,16 @@ int medusa_set_hue(struct cx25821_dev *dev, int hue, int decoder)
|
|||
return -1;
|
||||
}
|
||||
|
||||
ret_val =
|
||||
mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, hue, SIGNED_BYTE_MIN,
|
||||
SIGNED_BYTE_MAX, &value);
|
||||
ret_val = mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, hue,
|
||||
SIGNED_BYTE_MIN, SIGNED_BYTE_MAX, &value);
|
||||
|
||||
value = convert_to_twos(value, 8);
|
||||
val =
|
||||
cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
VDEC_A_HUE_CTRL + (0x200 * decoder), &tmp);
|
||||
val = cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
VDEC_A_HUE_CTRL + (0x200 * decoder), &tmp);
|
||||
val &= 0xFFFFFF00;
|
||||
|
||||
ret_val |=
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
VDEC_A_HUE_CTRL + (0x200 * decoder), val | value);
|
||||
ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
VDEC_A_HUE_CTRL + (0x200 * decoder), val | value);
|
||||
|
||||
mutex_unlock(&dev->lock);
|
||||
return ret_val;
|
||||
|
|
@ -749,27 +675,20 @@ int medusa_set_saturation(struct cx25821_dev *dev, int saturation, int decoder)
|
|||
return -1;
|
||||
}
|
||||
|
||||
ret_val =
|
||||
mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, saturation,
|
||||
UNSIGNED_BYTE_MIN, UNSIGNED_BYTE_MAX, &value);
|
||||
ret_val = mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, saturation,
|
||||
UNSIGNED_BYTE_MIN, UNSIGNED_BYTE_MAX, &value);
|
||||
|
||||
val =
|
||||
cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
VDEC_A_USAT_CTRL + (0x200 * decoder), &tmp);
|
||||
val = cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
VDEC_A_USAT_CTRL + (0x200 * decoder), &tmp);
|
||||
val &= 0xFFFFFF00;
|
||||
ret_val |=
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
VDEC_A_USAT_CTRL + (0x200 * decoder),
|
||||
val | value);
|
||||
ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
VDEC_A_USAT_CTRL + (0x200 * decoder), val | value);
|
||||
|
||||
val =
|
||||
cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
VDEC_A_VSAT_CTRL + (0x200 * decoder), &tmp);
|
||||
val = cx25821_i2c_read(&dev->i2c_bus[0],
|
||||
VDEC_A_VSAT_CTRL + (0x200 * decoder), &tmp);
|
||||
val &= 0xFFFFFF00;
|
||||
ret_val |=
|
||||
cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
VDEC_A_VSAT_CTRL + (0x200 * decoder),
|
||||
val | value);
|
||||
ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
|
||||
VDEC_A_VSAT_CTRL + (0x200 * decoder), val | value);
|
||||
|
||||
mutex_unlock(&dev->lock);
|
||||
return ret_val;
|
||||
|
|
@ -830,9 +749,8 @@ int medusa_video_init(struct cx25821_dev *dev)
|
|||
/* select AFE clock to output mode */
|
||||
value = cx25821_i2c_read(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL, &tmp);
|
||||
value &= 0x83FFFFFF;
|
||||
ret_val =
|
||||
cx25821_i2c_write(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL,
|
||||
value | 0x10000000);
|
||||
ret_val = cx25821_i2c_write(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL,
|
||||
value | 0x10000000);
|
||||
|
||||
if (ret_val < 0)
|
||||
goto error;
|
||||
|
|
|
|||
Loading…
Reference in New Issue