spmi: pmic-arb: convert to v2 irq interfaces to support hierarchical IRQ chips
Convert the spmi-pmic-arb IRQ code to use the version 2 IRQ interface in order to support hierarchical IRQ chips. This is necessary so that spmi-gpio can be setup as a hierarchical IRQ chip with pmic-arb as the parent. IRQ chips in device tree should be usable from the start without the consumer having to make an additional call to gpio[d]_to_irq() to get the proper IRQ on the parent. The old qpnpint_irq_domain_map function would hardcode the handler as handle_level_irq, however qpnpint_irq_set_type would later override the handler. Properly set the handler when the IRQ is mapped. This new code doesn't return an error for IRQ_TYPE_NONE and preserves the existing behavior of using handle_level_irq since there are some broken device tree bindings that need to be corrected first. Driver was tested on a LG Nexus 5 (hammerhead) phone. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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cfacef3735
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@ -666,7 +666,8 @@ static int qpnpint_get_irqchip_state(struct irq_data *d,
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return 0;
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}
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static int qpnpint_irq_request_resources(struct irq_data *d)
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static int qpnpint_irq_domain_activate(struct irq_domain *domain,
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struct irq_data *d, bool reserve)
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{
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struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
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u16 periph = hwirq_to_per(d->hwirq);
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@ -692,27 +693,25 @@ static struct irq_chip pmic_arb_irqchip = {
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.irq_set_type = qpnpint_irq_set_type,
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.irq_set_wake = qpnpint_irq_set_wake,
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.irq_get_irqchip_state = qpnpint_get_irqchip_state,
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.irq_request_resources = qpnpint_irq_request_resources,
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.flags = IRQCHIP_MASK_ON_SUSPEND,
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};
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static int qpnpint_irq_domain_dt_translate(struct irq_domain *d,
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struct device_node *controller,
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const u32 *intspec,
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unsigned int intsize,
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unsigned long *out_hwirq,
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unsigned int *out_type)
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static int qpnpint_irq_domain_translate(struct irq_domain *d,
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struct irq_fwspec *fwspec,
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unsigned long *out_hwirq,
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unsigned int *out_type)
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{
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struct spmi_pmic_arb *pmic_arb = d->host_data;
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u32 *intspec = fwspec->param;
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u16 apid, ppid;
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int rc;
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dev_dbg(&pmic_arb->spmic->dev, "intspec[0] 0x%1x intspec[1] 0x%02x intspec[2] 0x%02x\n",
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intspec[0], intspec[1], intspec[2]);
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if (irq_domain_get_of_node(d) != controller)
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if (irq_domain_get_of_node(d) != pmic_arb->spmic->dev.of_node)
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return -EINVAL;
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if (intsize != 4)
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if (fwspec->param_count != 4)
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return -EINVAL;
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if (intspec[0] > 0xF || intspec[1] > 0xFF || intspec[2] > 0x7)
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return -EINVAL;
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@ -740,17 +739,43 @@ static int qpnpint_irq_domain_dt_translate(struct irq_domain *d,
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return 0;
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}
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static int qpnpint_irq_domain_map(struct irq_domain *d,
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unsigned int virq,
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irq_hw_number_t hwirq)
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static void qpnpint_irq_domain_map(struct spmi_pmic_arb *pmic_arb,
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struct irq_domain *domain, unsigned int virq,
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irq_hw_number_t hwirq, unsigned int type)
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{
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struct spmi_pmic_arb *pmic_arb = d->host_data;
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irq_flow_handler_t handler;
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dev_dbg(&pmic_arb->spmic->dev, "virq = %u, hwirq = %lu\n", virq, hwirq);
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dev_dbg(&pmic_arb->spmic->dev, "virq = %u, hwirq = %lu, type = %u\n",
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virq, hwirq, type);
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if (type & IRQ_TYPE_EDGE_BOTH)
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handler = handle_edge_irq;
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else
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handler = handle_level_irq;
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irq_domain_set_info(domain, virq, hwirq, &pmic_arb_irqchip, pmic_arb,
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handler, NULL, NULL);
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}
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static int qpnpint_irq_domain_alloc(struct irq_domain *domain,
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unsigned int virq, unsigned int nr_irqs,
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void *data)
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{
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struct spmi_pmic_arb *pmic_arb = domain->host_data;
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struct irq_fwspec *fwspec = data;
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irq_hw_number_t hwirq;
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unsigned int type;
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int ret, i;
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ret = qpnpint_irq_domain_translate(domain, fwspec, &hwirq, &type);
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if (ret)
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return ret;
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for (i = 0; i < nr_irqs; i++)
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qpnpint_irq_domain_map(pmic_arb, domain, virq + i, hwirq + i,
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type);
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irq_set_chip_and_handler(virq, &pmic_arb_irqchip, handle_level_irq);
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irq_set_chip_data(virq, d->host_data);
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irq_set_noprobe(virq);
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return 0;
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}
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@ -1126,8 +1151,10 @@ static const struct pmic_arb_ver_ops pmic_arb_v5 = {
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};
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static const struct irq_domain_ops pmic_arb_irq_domain_ops = {
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.map = qpnpint_irq_domain_map,
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.xlate = qpnpint_irq_domain_dt_translate,
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.activate = qpnpint_irq_domain_activate,
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.alloc = qpnpint_irq_domain_alloc,
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.free = irq_domain_free_irqs_common,
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.translate = qpnpint_irq_domain_translate,
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};
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static int spmi_pmic_arb_probe(struct platform_device *pdev)
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