dt-bindings: doc: net: keystone-netcp: document cpts
The Keystone 2 66AK2HK/E/L 1G Ethernet Switch Subsystems contains The Common Platform Time Sync (CPTS) module which is in general compatible with CPTS module found on "legacy" TI AM3/4/5 SoCs. So, the basic support for Keystone 2 CPTS is available by default, but not documented. The Keystone 2 CPTS module supports also some additional features like time sync reference (RFTCLK) clock selection through CPTS_RFTCLK_SEL register (offset: x08) in CPTS module, which is modelled as multiplexer clock. This patch adds missed binding documentation for Keystone 2 66AK2HK/E/L CPTS module. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -104,6 +104,23 @@ Required properties:
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- 10Gb mac<->mac forced mode : 11
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----phy-handle: phandle to PHY device
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- cpts: sub-node time synchronization (CPTS) submodule configuration
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-- clocks: CPTS reference clock. Should point on cpts-refclk-mux clock.
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-- clock-names: should be "cpts"
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-- cpts-refclk-mux: multiplexer clock definition sub-node for CPTS reference (RFTCLK) clock
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--- #clock-cells: should be 0
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--- clocks: list of CPTS reference (RFTCLK) clock's parents as defined in Data manual
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--- ti,mux-tbl: array of multiplexer indexes as defined in Data manual
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--- assigned-clocks: should point on cpts-refclk-mux clock
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--- assigned-clock-parents: should point on required RFTCLK clock parent to be selected
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-- cpts_clock_mult: (optional) Numerator to convert input clock ticks
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into nanoseconds
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-- cpts_clock_shift: (optional) Denominator to convert input clock ticks into
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nanoseconds.
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Mult and shift will be calculated basing on CPTS
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rftclk frequency if both cpts_clock_shift and
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cpts_clock_mult properties are not provided.
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Optional properties:
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- enable-ale: NetCP driver keeps the address learning feature in the ethernet
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switch module disabled. This attribute is to enable the address
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@ -168,6 +185,23 @@ netcp: netcp@2000000 {
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tx-queue = <648>;
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tx-channel = <8>;
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cpts {
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clocks = <&cpts_refclk_mux>;
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clock-names = "cpts";
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cpts_refclk_mux: cpts-refclk-mux {
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#clock-cells = <0>;
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clocks = <&chipclk12>, <&chipclk13>,
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<&timi0>, <&timi1>,
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<&tsipclka>, <&tsrefclk>,
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<&tsipclkb>;
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ti,mux-tbl = <0x0>, <0x1>, <0x2>,
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<0x3>, <0x4>, <0x8>, <0xC>;
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assigned-clocks = <&cpts_refclk_mux>;
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assigned-clock-parents = <&chipclk12>;
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};
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};
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interfaces {
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gbe0: interface-0 {
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slave-port = <0>;
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@ -219,3 +253,13 @@ netcp: netcp@2000000 {
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};
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};
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};
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CPTS board configuration - select external CPTS RFTCLK:
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&tsrefclk{
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clock-frequency = <500000000>;
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};
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&cpts_refclk_mux {
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assigned-clock-parents = <&tsrefclk>;
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};
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